2005  
 
Gourary M.M., Rusakov S.G., Ulyanov S.L., Zharov M.M., Mulvaney B.J. Adaptive method of harmonic balance

 
Skrylev P.A., Smoleva O.S. Architecture of the unified computing block for contactless photon system of measurement of parameters of a rail track

 
Egorov Yu.B., Lyalinsky A.A. Automation of synthesis of VHDLAMS models for the mixed and analog behavioural simulation

 
Solovyev R.A., Gavrilov S.V. Delay noise analysis, using graph of constraint pairs

 
Bobkov S.G., Tokarev V.E. Designing of custommade blocks taking into account extraction RC parasitic parameters

 
Rakitin V.V., Uvarov A.K. Development of integral digital filters for sigmadelta converters using MATLAB

 
Djigan V.I. Efficiency of adaptive signal processing algorithms implementation on basis of MULTICORE SoC

 
Kornilov A.I., Semenov M.Y., Lastochkin O.V., Kalashnikov V.S. Methodology of designing of specialized calculators on the basis of the automated generation of technologically independent IPblocks

 
Bezrukov A.E., Rusakov A.S., Tkachev D.F., Khapaev M.M. Methods of the parasitic extraction of interconnect in the integral circuits

 
Gavrilov S.V., Glebov A.L. Noise analysis of digital circuits with accounting of logic constraints

 
Pugachev A.A. Numerical Simulation of Photosensitive VLSI Pixels

 
Kornilov A.I., Semenov M.Y., Lastochkin O.V., Kalashnikov V.S. Principles of construction of specialized calculators based on residual arithmetics

 
Bobkov S.G. Problems of creation of computers of series "Baguet" for problems with increased requirements to reliability of longterm functioning

 
Arakelov A.A., Sidorov E.A., Bobkov S.G. SRAM memory controller to maximize switch performance

 
Bobkov S.G., Evlampiev B.E., Sidorov A.Yu. The block of selftesting of internal memory

2006  
 
Aryashev S.I., Bobkov S.G., Zubkovskiy P.S. 64bit superscalar embedded RISC microprocessor

 
Gavrilov S.V., Glebov A.L., Lyalinskaya O.V., Solovyev R.A. Application of standard cell characterization results in statistical timing analysis

 
Prokopenko N.N., Budyakov A.S., Kryukov S.V. Architecture and circuit design of precision differential amplifiers with high common mode rejection ratio

 
Prokopenko N.N., Budyakov A.S., Sergeenko A.I. Buffer stage of operational amplifiers with low output impedance and option railtorail

 
Prokopenko N.N., Budyakov A.S., Kovbasyuk N.V. Circuit design methods of increasing the reliability of operational amplifiers with maximum speed in highsignal mode

 
Krutchinsky S.G., Prokopenko N.N., Starchenko E.I. Compensation of parasitic capacitances of the active elements in electronic devices

 
Stempkovsky A.L., Kornilov A.I., Semenov M.Y., Lastochkin O.V., Kalashnikov V.S. Construction of systems of raised reliability based on residual arithmetics with application of modern methods and tools of designing

 
Budyakov A.S., Prokopenko N.N., Starchenko E.I., Savchenko Ye.M., Krutchinsky S.G. Experience in design and modeling of analog circuits with limited parameters based on Russian bipolar technology

 
Kharlamov S.A. Information problems of supervision and control in a micromechanical gyroscope system

 
Djigan V.I. Lattice adaptive filtering algorithms is a new component of applied library for “Multicore” VLSI signal controller

 
Prokopenko N.N., Budyakov A.S., Kovbasyuk N.V., Krutchinsky S.G., Savchenko Ye.M. Methods of compensation of basic components of the output capacitance of transistors in analog chips

 
Egorov Yu.B., Rusakov S.G., Lyalinsky A.A. Modelling of radio engineering circuits with digital modulation within the frames of VHDLAMS simulation systems

 
Djigan V.I. Modern adaptive signal processing: problems and solutions

 
Bojko A.Ya., Bezrukov A.E., Rusakov A.S., Tkachev D.F., Khapaev M.M. New Algorithm for the 2D Capacitance calculation in the interconnect parasitic extraction problem

 
Pugachev A.A., Osochkin S.S. Physicaltopological model of modulation transfer fuction

 
Dvornikov O.V., Tchekhovski V.A., Krutchinsky S.G., Shchekin D.A., Shcherbinin I.P., Prokopenko N.N., Starchenko E.I. Practical developments and projects for substitution of import and IPprojects on base of radiationresistant analog array chip

 
Solovyev R.A., Glebov A.L., Gavrilov S.V. Static timing analysis aware false conduct path detection in terms of logic implication

 
Adamov Yu.F., Gorshkova N.M., Krupkina T.Yu. The Utilization of Photolayers for Bipolar Transistors Implementation in Typical CMOS Process

 
Prokopenko N.N., Budyakov A.S., Savchenko Ye.M., Korneev S.V. The dynamic extreme parameters of operational amplifiers with voltage feedback and amplifiers with current feedback in linear and nonlinear modes

 
Gourary M.M., Ulyanov S.L., Mulvaney B.J. The simulation method of nonlinear distortion of radio frequency circuits with digital modulation in circuit simulators

 
Zharov M.M., Rusakov S.G. Twolevel reduction of models of parasitic circuits of the high order

2008  
 
Uvarov A.K., Rakitin V.V. 16digit 6.4 MHz CMOS sigmadelta ADC for sound processing

 
Rusakov A.S., Khapaev M.M. Accuracy Improvement of the Interconnect Parasitic Capacitance Extraction

 
Djigan V.I. Adaptive arrays for digital communication systems: problems and solutions

 
Djigan V.I. Algorithms for adaptive filtering of nonstationary signal based on parallel computations

 
Kryukov S.V., Prokopenko N.N., Konev D.N. Architecture of differential operational amplifiers with increased commonmode noise stability

 
Budyakov A.S., Prokopenko N.N., Schmalz Klaus, Scheytt Christoph, Ostrovskyy P Circuit design of UHF operational amplifiers for analog interfaces with strong negative feedback

 
Gorshkova N.M. Constructive and technological design of silicon color photocells with deep color separation based on isotype ð+ð junctions

 
Muhanyuk N.N. Development of technologically independent method of designing analog IC on the basis of library of parametrical cells

 
Prokopenko N.N., Kryukov S.V., Khorunzhij A.V. Features of the design of analog circuits using transistors with low Early voltage

 
Bragin K.R., Gavrilov S.V., Kagramanyan E.R. Logictiming analysis methodology for characterization of custom blocks of digital CMOS IC

 
Gudkova O.N., Gavrilov S.V. Logical timing analysis of digital IC reliability with NBTI and HCI degradation effects

 
Gourary M.M., Zharov M.M., Rusakov S.G., Ulyanov S.L. Method of smallsignal analysis for the simulation of multitone radio frequency circuits

 
Prokopenko N.N., Budyakov A.S., Khorunzhij A.V. Nonlinear modes in multidifferential operational amplifiers

 
Prokopenko N.N., Budyakov A.S., Savchenko Ye.M. Operational amplifiers with generalized current feedback

 
Gourary M.M., Zharov M.M., Rusakov S.G., Ulyanov S.L. Perturbation methods and selective methods in problems of a reduction of highdimension models

 
Pugachev A.A., Maklakova O.V., Kushnir A.A. Photosensitive CCD VLSI TCAD modeling

 
Kharitonov I.A., Petrosyants K.O., Orekhov E.V., Yatmanov A.P., Sambursky L.M. Process and device simulation of CMOS SOI VLSI elements with an account for radiation effects

 
Stenin V.Ya., Betelin V.B., Bobkov S.G., Krasnyuk A.A., Osipenko P.N., Cherkasov I.G., Chumakov A.I., Yanenko A.V. Prospects of using submicronic CMOS VLSI in failureproof equipment working under impact of atmospheric neutrons

 
Stepchenkov Yu.A., Diachenko Yu.G., Bobkov S.G. QuasiDelayInsensitive Computing Device: Methodological and Algorithmic Aspects

 
Kagramanyan E.R., Gavrilov S.V., Egorov Yu.B. Standard cell characterezition methodoligy with respect MOSFET threshold voltage variation

 
Solovyev R.A., Gavrilov S.V., Glebov A.L. Statistical timing analysis aware of reconvergence of conduction paths and transition variations

 
Amerbaev V.M., Telpukhov D.V., Konstantinov A.V. The Bivalent Defect of Modular Codes. The Choise of Technological Modules, that Reduce Bivalent Defect

 
Andreev P.P., Pugachev A.A., Khodosh L.S. The project of the onchip processor for videostream processing are developed. This project are based on Russian SIMD processor PARS

2010  
 
Polevikov V.V. “CycleToCycle” methodology for timing analysis of high speed synchronous interfaces

 
Rakitin V.V. A Pipelined Analogto Digital Converters With Digital Calibration

 
Gourary M.M., Zharov M.M., Rusakov S.G., Lyalinsky A.A. Application of Selective Techniques for Parametric Model Order Reduction

 
Prokopenko N.N., Budyakov P.S., Serebryakov A.I. Architecture of the microwave differential operating amplifiers with paraphase output

 
Pugachev A.A., Stempkovsky A.L. CMOSAPS element with high chargecollection efficiency

 
Makarov A.B. CMOS analog blocks technology migration

 
Gourary M.M., Zharov M.M., Ulyanov S.L. Computational method for determining phase noise in oscillators

 
Adamov Yu.F. Designing and production problems of smart sensors controllers

 
Telpukhov D.V., Amerbaev V.M., Balaka E.S., Konstantinov A.V. Design method of DSPoriented modular logarithmic forward converter

 
Sibagatullin A.G. Influence Reduction of Technological Variations and Interferences on Signal Distortion in HighSpeed Integrated ADC for SystemonChip

 
Prokopenko N.N., Serebryakov A.I., Budyakov P.S. Method of Improving the Stability of Zero Analog Circuits with HighImpedance Node in the Conditions of Temperature and Radiation Effects

 
Balaka E.S., Amerbaev V.M., Konstantinov A.V., Telpukhov D.V. Methods of Scalar Products Speed Enhancement in Residue Logarithmic Number System Basis

 
Djigan V.I. Multichannel adaptive lattice filters

 
Rusakov A.S., Romano V. Numerical model of semiconductors with crystal heating

 
Prokopenko N.N., Budyakov A.S., Schmalz Klaus, Scheytt Christoph RF IPblocks based on Fully differential OpAmps for Communication Systems

 
Somov O.A., Adamov Yu.F., Gorshkova N.M., Sibagatullin A.G. Reconfigurable Smart Sensor Controllers

 
Amerbaev V.M., Kornilov A.I., Stempkovsky A.L. Residue Logarithmic Number System – A New Possibilities for Residue Processors and Converters Designing

 
Levchenko N.N., Okunev A.S. Specialized the architecture of the parallel multicore dataflow computing system for solution of task FFT

 
Makarov A.B., Kochkin I.P. Technology migration of CMOS band gap voltage reference

 
Gourary M.M., Rusakov S.G., Ulyanov S.L. The Development of the Method for Analyzing Mutual Synchronization Mode of Oscillators in Integrated Circuits

 
Gudkova O.N., Gavrilov S.V., Egorov Yu.B. The Method of Section Approximation for Grid Optimization for Standard Cell Library Characterization

 
Gudkova O.N., Skachkova E.P., Muhanyuk N.N., Gavrilov S.V., Solovyev R.A. The Methods of Fast Characterization of Large Scale Integration Parameterized IPblocks

 
Sibagatullin A.G., Adamov Yu.F., Gorshkova N.M., Somov O.A. The controller of the laser smoke fire detector with frequency filtering

2012  
 
Djigan V.I. Adaptive Antenna Array in RealValued Arithmetic

 
Prokopenko N.N., Budyakov P.S., Serebryakov A.I. Autonomous parameters of of transistors of uncommited logic array ABMK_1_3 in radiation and temperature influences

 
Gavrilov S.V., Gudkova O.N., Severtsev V.N. CMOS circuit interval static timing analysis accounting for logic correlations

 
Makarov A.B. CMOS frequency divider by 2 with high stability of output signal duty cycle

 
Budyakov P.S., Budyakov A.S., Prokopenko N.N. Comparative analysis of active mmwave SiGe mixers

 
Andreev A.E., Pavisic I., Rusakov A.S. Global placement algorithm for structured ASIC

 
Soloviev A.N. Gyrofree inertial navigation system

 
Djigan V.I. History, Theory and Practice of Adaptive Signal Processing

 
Amerbaev V.M., Telpukhov D.V., Balaka E.S., Konstantinov A.V. Implementation of Residue Number Systems Converter Combined with the Rounding Operation for DSP Applications

 
Petrosyants K.O., Kharitonov I.A., Orekhov E.V., Sambursky L.M., Yatmanov A.P., Voevodin A.V. Investigation of single event upset reliability for SOI CMOS SRAM cells using mixedmode 3D TCADSPICE simulation

 
Prokopenko N.N., Budyakov P.S., Pakhomov I.V. Methods to improve the gain of the classical stages on bipolar transistors at low supply voltage

 
Rakitin V.V. Nanometer merged MOS devices modeling

 
Amerbaev V.M., Stempkovsky A.L., Solovyev R.A. Parallel computing in the ring of Gaussian integers over the Galois field GF(p)

 
Levchenko N.N., Okunev A.S., Yakhontov D.E. Study of mapping processor for dataflow parallel computing system "Buran"

 
Kostukov E.V., Pospelova M.A., Pugachev A.A. TCADmodel of CCD image sensor with vertical antiblooming

 
Gavrilov S.V., Gudkova O.N., Pirutina G.A. The Gate Delay Analysis Method Accounting for Simultaneous Input Switching

 
Amerbaev V.M., Balaka E.S., Konstantinov A.V., Telpukhov D.V. The RLNS Implementation for matrix algebra special problems solution

 
Gourary M.M., Zharov M.M., Ulyanov S.L., Khodosh L.S. The computational method for nonlinear distortion analysis with multitone test signals

 
Gourary M.M., Zharov M.M., Rusakov S.G., Ulyanov S.L. The modeling of NBTI effect in analog integrated circuits

 
Adamov Yu.F., Balaka E.S., Gorshkova N.M., Sibagatullin A.G. The power effective communication line for systems on a crystal with dynamic management of frequency synchronization

 
Gourary M.M., Zharov M.M., Rusakov S.G. The reduction algorithms of linear networks with inductances on the base of selective methods of elimination

 
Levchenko N.N., Okunev A.S., Stempkovsky A.L. The usage of dataflow computing model and architecture realizing these for exaflops performance system

 
Levchenko N.N., Okunev A.S., Yakhontov D.E., Shurchkov I.O. Variants of realization of controller for parallel dataflow computing system to work with vector and multioperand nodes

 
Lyalinsky A.A. Webbased Generation of Highlevel Models of Digital Cells

 
Lyalinsky A.A. Webbased automatic generation of input patterns at characterization of digital cells

2014  
 
Amerbaev V.M., Balaka E.S., Solovyev R.A., Telpukhov D.V. Analysis and synthesis of arithmetic unit of a field of Galois of prof. Pospelov D.A.

 
Rusakov A.S., Sheblaev M.V. Decomposition Algorithm of the Electronic Circuits with Elements with Varied Area

 
Bobkov S.G., Gorbunov M.S., Diachenko Yu.G., Rozhdestvenskij Yu.V., Stepchenkov Yu.A., Surkov A.V. Delay Insensitive Circuits for Low Power and Highly Reliable Microprocessors

 
Soloviev A.N., Sablin A.V., Lyalinsky A.A. Development of the simulation environment of inertial navigation systems

 
Solovyev R.A., Balaka E.S., Telpukhov D.V. Device for calculation of vector dot product with error correction based on residue number system

 
Chaplygin Yu.A., Timoshenkov V.P., Shevyakov V.I., Adamov Yu.F. Electrostatic protection of BiCMOS IC's

 
Telpukhov D.V., Amerbaev V.M., Balaka E.S., Solovyev R.A. Hardware implementation of FIR filter based on numbertheoretic fast Fourier transform in residue number system

 
Aryashev S.I., Barskikh M.E., Bobkov S.G., Zubkovskiy P.S., Ivasyuk E.V. Implementation of the combustion problem main functions based on specialized vector coprocessor FMA operations

 
Djigan V.I. LMS adaptive filtering algorithm: first or unique one for practical applications?

 
Prokopenko N.N., Chernov N.I., Yugai V.Ya. Linear synthesis  a new approach to the logical design of kvalued digital structures

 
Ivannikov A.D., Stempkovsky A.L. Mathematical model for complex digital circuits and microsystems projects debugging based on presenting the latest as a family of stationary dynamical systems

 
Aryashev S.I., Bobkov S.G., Sayapin P.V. Methodology of the optimization and efficiency evaluation for the Secondary Cache

 
Gavrilov S.V., Ivanova G.A., Manukyan A.A. Methods of designing custom IPblocks based on the elements with regular topological structure in layers of polysilicon and diffusion

 
Prokopenko N.N., Serebryakov A.I., Butyrlagin N.V. Methods of highfrequency correction for analog sections in ultrafast ADCs with differential input

 
Klimov A.V., Zmejev D.N., Levchenko N.N., Okunev A.S. Methods of regulation of computation in parallel dataflow computating system

 
Zharov M.M., Rusakov S.G. Model Order Reduction Techniques with Preservation of Sparseness in Circuit Simulation

 
Rakitin V.V. Modeling memristor circuits

 
Gourary M.M., Rusakov S.G., Ulyanov S.L. Nonlinear Phase Macromodel for the Analysis of oscillator circuits

 
Zmejev D.N., Levchenko N.N., Okunev A.S., Stempkovsky A.L. Research the principles of operation of the input block for the parallel dataflow computing system

 
Zharov M.M. The Numerical Algorithm for Stability Analysis of Large Dynamical Systems

 
Zmejev D.N., Levchenko N.N., Okunev A.S., Klimov A.V. The architecture of scheduler of mapping processor of PDCS "Buran"

 
Prokopenko N.N., Butyrlagin N.V., Pakhomov I.V. The main parameters and equations of basic configurations multidifferential operational amplifiers with high impedance node

 
Pugachev A.A., Ivanova G.A. The method for photosensitive matrix VLSI modulation transfer function simulation

 
Gourary M.M., Rusakov S.G., Ulyanov S.L. The method of harmonic balance for electrothermal analysis of periodic steady states of IC

 
Ryzhova D.I., Gavrilov S.V. The method of peak current estimation at logic level taking into account simultaneous switching of inputs

 
Volobuev P.S., Gavrilov S.V., Ryzhova D.I. The method of static power reducing for CMOS circuits based on sleep transistors with operation speed control

 
Stempkovsky A.L., Amerbaev V.M. The principle of factorization in a problem of design of RBSbased processors

 
Chaplygin Yu.A., Adamov Yu.F., Timoshenkov V.P. Using of VBIC model for SiGe integrated circuit application

2016  
 
Shlepnev A.A. Adoption of Genetic Algorithms for running in elastic compute environment concerning CAD applications

 
Klimov A.V., Okunev A.S. A graphical dataflow metalanguage for asynchronous distributed programming

 
Zelenko G.V., Ivannikov A.D., Roschin A.V., Stempkovsky A.L. Algebraic Decomposition Models for Digital System Design Debugging by Simulation

 
Matyushkin I.V. Algorithms of the parallel computations in the formalization of cellular automata: the sorting of strings and the multiplication of numbers by Atrubin’s method

 
Calem M.M., Nematov M.G., Uddin A., Panina L.V., Morchenko A.T., Skidanov V.A. Amorphous glasscoated microwires for applications as embedded stress sensors in functional materials

 
Matyushkin I.V., Zapletina M.A. Cellular automata methods of the numerical solution of mathematical physics equations for the hexagonal grid

 
Telpukhov D.V., Solovyev R.A., Balaka E.S., Rukhlov V.S., Mikhmel A.S. Design features of the multipliers on the module using advanced CAD

 
Zmejev D.N. Design tools of highperformance dataflow computing systems

 
Djigan V.I. Fast Affine Projection Algorithm: Full Version

 
Ostrovskaya N.V., Skidanov V.A., Iusipova Iu.A. Features of magnetization reversal in a MRAM cell — I. Inplane anisotropy

 
Ostrovskaya N.V., Skidanov V.A., Skvortsov M.S. Features of magnetization reversal in a MRAM cell — II. Perpendicular anisotropy

 
Lyalinsky A.A. Generation of large sets of logical functions for digital integrated circuits CAD systems

 
Garbulina T.V., Lyalinskaya O.V., Khvatov V.M. Improving the efficiency of the design integrated circuits on FPGA with limited resources to trace

 
Prokopenko N.N., Chernov N.I., Yugai V.Ya., Butyrlagin N.V. Linear Synthesis of kvalued Digital Structures: Principle of Generalization

 
Rakitin V.V., Rusakov S.G. Memristor oscillator Schmitt trigger with multiple steady states of dynamic equilibrium

 
Sapogin V.G., Prokopenko N.N., Ivanov Y.I., Bugakova A.V. Nanodimensional effect at planar inductance with “conducting film inside current ring”technology

 
Gavrilov S.V., Zhukova T.D., Ryzhova D.I. Optimization methods of coding circuits based on the binary decision diagrams for synthesis of faulttolerant micro and nanoelectronic circuits

 
Gourary M.M., Zharov M.M., Rusakov S.G., Ulyanov S.L., Lyalinsky A.A. Parameter optimization subsystem of CMOS operational amplifiers

 
Stempkovsky A.L., Telpukhov D.V., Solovyev R.A., Telpukhova N.V. Probabilistic methods for reliability evaluation of combinational circuits

 
Gourary M.M., Zharov M.M., Ulyanov S.L., Khodosh L.S. Rational Transfer Functions Approximation on the Base of Integral Accuracy Criterion

 
Gourary M.M., Zharov M.M., Ionov L.P., Mukhin I.I., Rusakov S.G., Ulyanov S.L. Simulation of PLL Perturbation Based on Blocks Transfer Functions

 
Dvornikov O.V., Prokopenko N.N., Bugakova A.V., Ignashin A.A. The Instrumentation and Differential Difference Amplifiers of Sensor Systems Based on the New Microcircuit of the Structured Array MH2XA010

 
Gurov S.I., Ryzhova D.I. The algorithm for synthesis of digital ICs based on the Gilbert decomposition

 
Klimov A.V., Levchenko N.N., Okunev A.S., Stempkovsky A.L. The application and implementation issues of dataflow computing system

 
Adamov Yu.F., Balaka E.S., Rukhlov V.S. The circuitry of electronic devices that operate in conditions of electromagnetic noise

 
Zmejev D.N., Klimov A.V., Levchenko N.N. The means for computation distribution in the PDCS "Buran" and the implementation variants of a block of hashfunctions

 
Kononov A., Pugachev A.A. The method for CMOS APS lightvoltage characteristics technologicaldevice modeling

 
Zheleznikov D.A., Lyalinsky A.A. The method of timing optimization for FPGA at the microarchitecture level using the pipelining mechanism

 
Gavrilov S.V., Zhukova T.D., Ryzhova D.I. The methods of timelogic analysis of library elements and VLSI blocks for advanced technologies with a vertical transistor’s gate

 
Zmejev D.N., Kuzmin E.N., Levchenko N.N., Okunev A.S. Trends in development of content addressable memory architectures and its application in the parallel dataflow computing system

2018  
 
Levchenko N.N., Okunev A.S., Stempkovsky A.L. Advantages of Dataflow Computing Model

 
Ryzhova D.I., Vasilyev N.O., Zhukova T.D. Algorithm of Intergate Resynthesis at the Transistor Level for Computeraided Design of Microelectronic Circuits

 
Andreev A.E., Rusakov A.S., Yahontov A. Analytical Timing Driven Global Placement of Structured ASIC

 
Klimov A.V., Levchenko N.N. Branches in the Dataflow Metalanguage UPL (METAL) and Methods of their Implementation in the PDCS “Buran”

 
Matyushkin I.V., Zapletina M.A. Cellular Automata Computational Parallelism of Elementary Matrix Operations

 
Lyalinsky A.A. Characterization of Analog Circuits Based on Cloud Computing

 
Telpukhov D.V., Zhukova T.D., Demeneva A.I., Gurov S.I. Circuit of the Functional Control for Combinational Circuits Based on Rcode

 
Dvornikov O.V., Tchekhovski V.A., Diatlov V.L., Prokopenko N.N., Budyakov P.S. Design of Voltage Comparators Based on the Elements of the RadiationHardened LowTemperature BiJFET Array Chip MH2XA030

 
Zmejev D.N., Okunev A.S. Development and Investigation of Algorithm of Sparse Matrices Multiplication Task for the Parallel Dataflow Computing System "Buran"

 
Tiunov I.V., Lipatov I.A., Zheleznikov D.A. Development of Methods for Architecturallyoriented Resynthesis in the Computeraided Design Flow for FPGAs

 
Telpukhov D.V. Development of Methods for Genetic Synthesis of FaultTolerant Logic circuits

 
Nadolenko V.V., Telpukhov D.V., Bitkov U. Development of Resynthesis Flow for Improving Logical Masking Features of Combinational Circuits

 
Ostrovskaya N.V., Skidanov V.A., Iusipova Iu.A. Dynamics of Magnetization in the Free Layer of a Spin Valve Under the Influence of Magnetic Field, Perpendicular and Parallel to the Layer Plane

 
Khvatov V.M., Garbulina T.V., Lyalinskaya O.V. Formation and Verification of Standard Element Libraries in the Design Flow for the Domestic FPGAs

 
Denisenko D.Yu., Prokopenko N.N. LowSensitivity Active RCfilter of the Second Order with an Extended Frequency Range

 
Zmejev D.N., Klimov A.V., Levchenko N.N., Okunev A.S. Methods for Computation Planning in the Parallel Dataflow Computing System "Buran"

 
Pugachev A.A., Ivanova G.A. Modulation Transfer Function Model for Photosensitive VLSI Under One Single Impact Particle Event

 
Lyalinsky A.A. Optimization Procedures in the Analog Circuit CAD System

 
Gavrilov S.V., Zheleznikov D.A., Chochaev R., Khvatov V.M. Partitioning Algorithm Based on Simulated Annealing for Reconfigurable SystemsonChip

 
Ivannikov A.D. Research and Development of Digital System Block Models Based on Their Description as a Stationary Dynamical System Family

 
Gourary M.M., Zharov M.M., Rassadin A.E., Rusakov S.G., Ulyanov S.L. Simulation of Circuits with Ferroelectric Capacitances

 
Ostrovskaya N.V., Skvortsov M.S., Skidanov V.A., Iusipova Iu.A. Simulation of Magnetization Dynamics in Threelayered Ferromagnetic Structures with Pinned Boundaries

 
Gourary M.M., Zharov M.M., Rusakov S.G., Ulyanov S.L. The Application of Singlestep High Order Integration Methods for Periodic Steadystate Analysis of Integrated Circuits

 
Gourary M.M., Zharov M.M., Ionov L.P., Mukhin I.I., Ten I.M., Ulyanov S.L. The Characterization Flow and Simulation Method of Frequency Synthesizer

 
Butyrlagin N.V., Chernov N.I., Prokopenko N.N., Yugai V.Ya. The Design of Current Memory Elements Based on the Mathematical Tool of Linear Algebra

 
Zheleznikov D.A., Zapletina M.A., Khvatov V.M. The Ripup and Reroute Technique Research for Physical Synthesis in the Basis of Reconfigurable SoCs

 
Rakitin V.V. The Symmetrized Memristor Relaxation Oscillator

 
Solovyev R.A., Kustov A.G., Rukhlov V.S. The Technique for Implementing a Neural Network for Recognizing Handwritten Digits in FPGAs Based on Fixed Point Calculations

 
Djigan V.I. Twodimensional Adaptive Antenna Arrays in Complexvalued and Realvalued Arithmetic

2020  
 
Ivannikov A.D., Stempkovsky A.L. Analysis of Iterative Methods for Solving Logical Equation Systems and their Use in Digital System Simulation

 
Zhukov D.V., Zheleznikov D.A., Zapletina M.A. Application of SAT Approach to Switch Blocks Routing for Reconfigurable Systemonachip

 
Pilipenko A.M., Prokopenko N.N., Budyakov P.S. Application of the template model for approximation of differential characteristics of complementary JFETs

 
Ilin S.A., Korshunov A.V., Garbulina T.V. Benchmarking Energy Efficiency of Libraries on FinFET 7nm

 
Kurganov V.V., Djigan V.I. Calibration of Antenna Arrays with Small Number of Antennas: Problems and Solutions

 
Rakitin V.V. Chaotic memristor oscillator with switching capacitor amplifier

 
Lyalinsky A.A. Characterization of FPGAbased Digital Libraries

 
Mikhmel A.S., Mkrtchan I.A., Telpukhov D.V. Development of Special Logic Element Models for Timing Analysis of Reconfigurable SystemonaChip

 
Zhukova T.D. Development of a computeraided design system based on redundant coding methods

 
Djigan V.I. Direct Learning Digital Predistorters for Power Amplifiers

 
Bobkov S.G. Directions and methods for improving the performance of microprocessors

 
Iusipova Iu.A. Energy efficiency and performance of spinvalve structures in MRAM and HMDD

 
Gourary M.M., Rusakov S.G. Features of the application of envelope methods for the analysis of autonomous oscillators

 
Ostrovskaya N.V., Skidanov V.A. Fieldlike torquecomponent influence on the magnetization dynamics in the threelayered nanostructure

 
Djigan V.I. Fractionally Spaced FeedBackward Equalizers, based on Fast RLS Adaptive Filtering Algorithms

 
Iusipova Iu.A. Frequency and amplitude characteristics of STNO based on a spin valve with planar and perpendicular layer anisotropy

 
Ivannikov A.D. Function test set formation for design correctness checking

 
Rukhlov V.S., Solovyev R.A., Kustov A.G. Hardware and software solutions to increase the reliability of combinational logic in the FPGA basis without taking into account interconnections and the I/O blocks

 
Zmejev D.N., Levchenko N.N., Okunev A.S., Stempkovsky A.L. Impact of features of the computing model and architecture on the reliability of the parallel dataflow computing system

 
Vasilyev N.O., Tiunov I.V., Ryzhova D.I. Logic Resynthesis Method in the FPGA Design Flow

 
Zmejev D.N., Levchenko N.N., Okunev A.S. Methods and approaches to improving the reliability of the parallel dataflow computing system

 
Gourary M.M., Rusakov S.G. Parametrized Kuramoto Model for Coupled Oscillators with Fractional Frequencies Ratios

 
Drozdov D.G., Prokopenko N.N., Savchenko Ye.M., Dukanov P.A., Grushin A.I. Research of highvoltage complementary junction fieldeffect transistors over a range of temperature using methods of TCAD process/device modeling

 
Tiunov I.V. Resynthesis methods for FPGAs based on cells with separated outputs and builtin feedback

 
Gavrilov S.V., Khvatov V.M., Zheleznikov D.A., Garbulina T.V. Static Timing Analysis Method with Routing Resources Estimation for Reconfigurable SystemonaChip

 
Dvornikov O.V., Tchekhovski V.A., Prokopenko N.N., Galkin Ya.D., Kunts A.V. Taking into Account the Simultaneous Effect of Low Temperatures and Penetrating Radiation on the Characteristics of the Bipolar and JFETs in the Circuit Simulation

 
Zapletina M.A., Zheleznikov D.A., Gavrilov S.V. The Hierarchical Approach to Island Style Reconfigurable Systemonachip Routing

 
Gourary M.M., Zharov M.M., Rusakov S.G., Ulyanov S.L. The adaptive algorithm for the analysis of oscillatory circuits

 
Frolova P.I., Chochaev R., Ivanova G.A., Gavrilov S.V. Timingdriven placement algorithm based on delay matrix model for reconfigurable systemonchip

 
Klimov A.V. Tools for verification of computation distribution in the Parallel Dataflow Computing System (PDCS) “Buran”

 
Lyalinsky A.A. Webbased Characterization of Digital Libraries

2021  
 
Djigan V.I., Kurganov V.V. Accuracy of PhaseLess Algorithms of Antenna Array Calibration

 
Dvornikov O.V., Tchekhovski V.A., Prokopenko N.N., Galkin Ya.D., Kunts A.V., Chumakov V.E. Analog integrated circuits design for extreme environmental conditions on the base of master slice array MH2XA031

 
Telpukhov D.V., Zhukova T.D., Kretinina P.D. Analytical Method for Choosing the Most Efficient Algorithm for FaultTolerant Combinational Circuits Synthesis

 
Stempkovsky A.L., Bobkov S.G., Zmejev D.N., Levchenko N.N., Klimov A.V. Automated Optimal Configuration Determination of the Parallel Dataflow Computing System for Solving a Specific Problem

 
Klimov A.V. Automatic Differentiation in a Dataflow Language on the Example of a Deep Learning Problem

 
Rubis P.D., Matyushkin I.V. Cellularautomaton algorithm of matrices permutation with an oscillatory scheme of element shift

 
Gourary M.M. Compact model generation for distributed parameter systems

 
Frolova P.I., Chochaev R. Development and Comparative Analysis of Initial Placement Methods for FPGA

 
Ivannikov A.D., Stempkovsky A.L. Digital Block Mathematical Model for the Joint Hardware and Software/firmware Simulation System

 
Kuzminova T.D., Khvatov V.M., Zheleznikov D.A. Formation of the reduced logical elements library for FPGA

 
Dvornikov O.V., Pavluchik A.A., Prokopenko N.N., Tchekhovski V.A., Kunts A.V., Chumakov V.E. GaAs analog master slice

 
Ostrovskaya N.V., Skidanov V.A., Iusipova Iu.A. Mathematical Model of the SOTMRAM Cell based on the Spin Hall Effect

 
Zapletina M.A. Methods for speeding up the modified Pathfinder routing algorithm for islandstyle FPGA

 
Gourary M.M., Rusakov S.G., Ulyanov S.L. Numerical Technique of Noise Analysis based on TwoLevel Mixed Frequency–Timemodels for Circuit Simulators

 
Ilin S.A., Zapletina M.A., Lastochkin O.V. Optimization of Standard Cells Power Consumption: Logical Effort Based Algorithm

 
Ivannikov A.D. Organization of Debugging Process for Digital Microelectronic System Designs

 
Telpukhov D.V., Nadolenko V.V. ReliabilityDriven Logic Synthesis Using Arbitrary Standard Cell Library

 
Ivannikov A.D. Structure Formalization of Management Information System Software

 
Gourary M.M., Rusakov S.G., Ulyanov S.L. The Development of Multiterminal Element Model with Arbitrary Number of Terminals for Circuit Simulator

 
Rusakov S.G., Ulyanov S.L. The SteadyState Analysis of Integrated Circuits Using Homotopy Methods

2022  
 
Djigan V.I. Adaptive Equalization of Frequency Response of Acoustic Wave Propagation Channels in Closed Rooms

 
Rakitin V.V., Rusakov S.G., Ulyanov S.L. Analysis of Coupled Memristor based Oscillators using Circuit Simulators

 
Frolova P.I., Khvatov V.M., Chochaev R. Comparative Analysis of Clustering and Placement Methods for Reconfigurable SystemonChips

 
Stempkovsky A.L., Telpukhov D.V., Zhukova T.D. Development of Concurrent Error Detection Circuit Based on Automated Generation of ErrorCorrecting Code

 
Goglev G.I., Tiunov I.V. Development of a Digital Integrated Circuits Visualization Algorithms at the Gate Level

 
Lebedev O.B., Lebedev B.K., Schelokov A.N. Distribution of connections by layers in multilayer global routing

 
Samoilov L.K., Prokopenko N.N., Denisenko D.Yu. Dynamic Errors of Bandpass Bessel Filters Switched on at the ADC Input

 
Prokopenko N.N., Dvornikov O.V., Chumakov V.E., Kleimenkin D.V. Gallium arsenide operational amplifiers with transconductance multipliers of input differential stages

 
Lyalinsky A.A. Generation of Logical Function Libraries

 
Kustov A.G., Solovyev R.A., Stempkovsky A.L., Telpukhov D.V. Hardware Implementation of a Neural Network for Object Detection in FPGA

 
Zhigulin A.S., Solovyev R.A. Hardware Implementation of an Accelerated Approximated Matrix Multiplier Based on MADDNESS Algorithm

 
Levchenko N.N., Zmejev D.N. Implementation of Majority Function Based on Matching Processor in the Parallel Dataflow Computing System "Buran"

 
Stempkovsky A.L., Telpukhov D.V., Mkrtchan I.A., Solovyev R.A. Implementation of an RNS Reverse Converter for General Moduli Sets Based on LUTs with Reference Points

 
Iusipova Iu.A., Ostrovskaya N.V., Skidanov V.A. Mathematical model of a cylindrical SOTMRAM cell

 
Rusakov S.G., Gourary M.M. Method of Merging Models to Analyze the Synchronization Modes of Coupled Oscillators

 
Lyalinsky A.A. Methodology for the Effective Construction of Large Tables

 
Ivannikov A.D. On mathematical models of digital microelectronic systems and verification of the sequence of functions performed at the design stage

 
Levchenko N.N., Zmejev D.N. Research of Various Options for Implementing Program Construction «Loop» in Dataflow Computing Model

 
Nadolenko V.V. Three level logic minimization using graphics processing units

