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Formation of the reduced logical elements library for FPGA  

Authors
 Kuzminova T.D.
 Khvatov V.M.
 Zheleznikov D.A.
Date of publication
 2021
DOI
 10.31114/2078-7707-2021-4-34-39

Abstract
 A standard logic elements library is an essential attribute of any computer-aided design system for digital integrated circuits. The design of the device depends on the set of elements that compose the library for logical synthesis. But at the same time, the composition variety of the logical elements library affects the time required to carry out the process of characterizing each of the library elements. This paper discusses the formation of a reduced composition of the standard cells library for programmable logic integrated circuits (FPGA). The analysis of the element base is shown using two different programs for logical synthesis - Yosys and Cadence RTL Compiler. The paper describes the features of using the Liberty library in these programs and the analyzed parameters of the synthesized circuits. Also, it shows the criteria for library reducing which is the basis for the final logical elements composition formation.
Keywords
 field programmable gate array, FPGA, logic gates, library, integrated circuit, library characterization.
Library reference
 Kuzminova T.D., Khvatov V.M., Zheleznikov D.A. Formation of the reduced logical elements library for FPGA // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2021. Issue 4. P. 34-39. doi:10.31114/2078-7707-2021-4-34-39
URL of paper
 http://www.mes-conference.ru/data/year2021/pdf/D054.pdf

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