| “Cycle-To-Cycle” methodology for timing analysis of high speed synchronous interfaces |
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| Authors |
| | Polevikov V.V. |
| Date of publication |
| | 2010 |
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| Abstract |
| | “Cycle-To-Cycle” methodology for timing analysis of high speed synchronous in-terfaces is proposed. Short description of interface model, initially realized by SiSoftTM in “Quantum SI”(QSI) tool, is presented. Two techniques of synchronous interface timing analysis, QSI and “Cy-cle-To-Cycle”, are described. Timing analysis of DDR1-400 MHz interface had been done for both techniques. The results were compared. Implementation of “Cycle-To-Cycle” and QSI algorithms was done in Matlab environment. |
| Keywords |
| | Synchronous interface, “cycle – to - cycle” methodology, signal integrity |
| Library reference |
| | Polevikov V.V. “Cycle-To-Cycle” methodology for timing analysis of high speed synchronous interfaces // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2010. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2010. P. 406-411. |
| URL of paper |
| | http://www.mes-conference.ru/data/year2010/papers/m10-137-66491.pdf |
