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Variants of realization of controller for parallel dataflow computing system to work with vector and multioperand nodes

Authors
 Levchenko N.N.
 Okunev A.S.
 Yakhontov D.E.
 Shurchkov I.O.
Date of publication
 2012

Abstract
 The paper reviews the architecture of parallel dataflow computing system "Buran", describes the operation mechanisms of one of the main system modules – the mapping memory unit. The possibility of system operation with vector and multioperand nodes is researched. The requirements to the memory controller needed to work with the new data structures are indicated. The algorithms to implement them are proposed.
Keywords
 parallel dataflow computing system; vector computing; memory controller; memory allocation algorithms
Library reference
 Levchenko N.N., Okunev A.S., Yakhontov D.E., Shurchkov I.O. Variants of realization of controller for parallel dataflow computing system to work with vector and multioperand nodes // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2012. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2012. P. 463-466.
URL of paper
 http://www.mes-conference.ru/data/year2012/pdf/D100.pdf

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