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Listing of works with the partition by the subject of reports. Click on the work title to see its details. The selected set may be restricted by specifying a range of conference years, or by selecting a specific topic.

Select: from 2005 2006 2008 2010 2012 2014 2016 2018 2020 2021 2022 2023 2024 to 2005 2006 2008 2010 2012 2014 2016 2018 2020 2021 2022 2023 2024 year

All topics ADC design problems Cellular automata Design of System-on-chip (SoC) and IP-blocks Design of VLSI elements Design of VLSI signal processors Design of analog and mixed functional blocks of VLSI Design of digital functional blocks of VLSI Design of fault-tolerance systems Design of micro-electromechanical systems Design of nanoelectronic devices Design of nanoelectronic devices based on Josephson junctions Design of photodetecting VLSI Design of radiation-resistant VLSI Design of technological processes Designing components for aerospace and navigation technology Genetic algorithms in VLSI CAD Methods and algorithms for automated layout design Methods for high-level simulation Methods of device technology simulation of VLSI Methods of digital information processing and digital filters Methods of electro-thermal simulation Methods of logic synthesis and functional logic simulation ... Methods of simulation of VLSI electrical characteristics Models of devices for circuit simulation Neural networks Problems of development of sensory microcircuitry Simulation of data transfer channels Study of the magnetic properties of materials Unconventional computing systems Web-based VLSI CAD design of memory cells

Selection on topic: Methods for high-level simulation

Selected papers: from 2005 to 2024 year

In selection - 148 papers

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A
	A Fast Algorithm for Finding Vertices Accessible via Constrained Paths in a Control Flow Graph A Machine Learning-Based Switching Power Prediction at Floorplan Stage of IC Physical Design A Method for Selecting an Isomorphic Subgraph of a Circuit Diagram Graph in Electronic Circuit CAD Systems A Method of Functional Test Generation for HDL Descriptions Based on Model Checking of High-Level Decision Diagrams A Practical Approach to Verification of Multicore Microprocessor Models ASIAN - Self-Timed Logic Circuits Analysis Subsystem Accuracy Estimation of Discrete Optimization Algorithms Adaptation of performance tests for the 64-bit universal superscalar microprocessor Adjustable error-correcting encoder for Systems on Chip Adoption of Genetic Algorithms for running in elastic compute environment concerning CAD applications Advantages of Dataflow Computing Model A fast algorithm for data dependency tracking in Software and Firmware analysis and testing A graphical dataflow meta-language for asynchronous distributed programming Algorithm of assigning operations for specialized processors with clusterized resources Analysis of Open-source EDA Tools OpenLANE for ASIC Design Analysis of modern microprocessors peak performance An approach to hardware test point insertion automation based on hardware reengineering tools Ant algorithm for determining the critical linkages in VLSI Application of visual tools for system modeling of digital integrated circuits Architecture validation tests for RTL-model of 64-bit superscalar microprocessor Assessment of Functional Stability of the Dynamic Sensor Network Atomic instructions random tests generation using lock contention analysis Automated design of Networks-on-Chip with custom topology Automatic Differentiation in a Dataflow Language on the Example of a Deep Learning Problem Automation of High-Level Network-on-Chip Modeling Automation of synthesis of VHDL-AMS models for the mixed and analog behavioural simulation Automation of verification environments development process providing a through design flow for design, verification and research of IP-blocks and SoC
B
	Bit error rate calculation in high performance communication channels Branches in the Dataflow Metalanguage UPL (METAL) and Methods of their Implementation in the PDCS “Buran”
C
	CAD system for self-timed electronic circuits RONIS Circuit Design of Synchronizing Devices Within High-speed Data Services Combinatorial Test Program Generation for Microprocessors Based on Formal Specifications of Instruction Set Architecture Common approaches to the FPU verification Comparative analysis of efficiency of different variants of the dynamic programming method for solving the problem of optimal placing of elements on the chip Complex platform of functional verification of Mentor Graphics Construction of systems of raised reliability based on residual arithmetics with application of modern methods and tools of designing Creation of CAD - systems’ ontology using Protege 4.2 Criteria for the numerical evaluation of data recovery algorithms for analogue-information converters
D
	Debugging and testing of VLSI models with use of the prototypes realized on PLIC Designing a high-performance SoC based on a 16-bit processor core Designing of regular circuits with consecutive connections of transistors Designing specialized heterogeneous FPGAs using software prototyping Design tools of high-performance dataflow computing systems Development and Investigation of Algorithm of Sparse Matrices Multiplication Task for the Parallel Dataflow Computing System "Buran" Development of Capsule Programming Means for Recurrent Data-flow Architecture Development of Methods for Architecturally-oriented Resynthesis in the Computer-aided Design Flow for FPGAs Development of Routing Algorithms in Networks on Chip with a Multiplicative Circulant Topology Development of behavioural cycle-accurate model of a system-on-chip with C++ Diagnostic facilities and configurable digital systems on crystal portable integration Dynamic management of computations in distributed systems
E
	Engineering Systems of Emulation Modules in KUB-PRO Form-factor Estimation of digital sensor's influence on the management systems efficiency Evolutionary Algorithms of Test Generation for Crosstalk Faults of Digital Circuits Evolution in the area of multicore heterogeneous video data processing systems
F
	FPGA System Design Using Visual Languages Function test set formation for design correctness checking
G
	Generating the test program for mixed-signal integrated circuits using the automata network Graphs of communications and placement of nodes in "networks-on-chip"
H
	Hardware acceleration of digital simulation High level model based verification of digital circuits behavior
I
	Impact of features of the computing model and architecture on the reliability of the parallel dataflow computing system Implementation of Majority Function Based on Matching Processor in the Parallel Dataflow Computing System "Buran" Implementation of Methodology of SoC Interconnects Automated Performance Analysis into the Verification Route Improving the efficiency of the design integrated circuits on FPGA with limited resources to trace Instruction set architecture R2T Interconnect Verification Methods Based on Unified Test Infrastructure
K
	Key features of static timing analysis and SDC development for complex system-on-chip ASIC with multiple asynchronous clock domains
M
	MPI-based Software Model for Parallel Computing in Heterogeneous Clusters Mathematical model for complex digital circuits and microsystems projects debugging based on presenting the latest as a family of stationary dynamical systems Mathematical model of the functioning a specialized microprocessor device as a basis for compiling its functional specification Method of automation of process of development of the crossbar for multicore system whith nonuniform memory access Method of optimum curtailing of the scheme. The effective approach for the qualitative solution for non-polynomial combinatory problems of the large and superlarge dimensions in automated designing microelectronic devices Methodology of designing of specialized calculators on the basis of the automated generation of technologically independent IP-blocks Methods and approaches to improving the reliability of the parallel dataflow computing system Methods for Computation Planning in the Parallel Dataflow Computing System "Buran" Methods of Achieving Test Scenario Portability Between Different Verification Environments Methods of regulation of computation in parallel dataflow computating system Methods to improve efficiency of microprocessor model stochastic tests MicroTESK-Based Test Program Generator for the RISC-V Architecture Modeling and Verification of Communication Fabrics in System on Chip Design Models and methods for SoC verification Modernized design methodology blocks complex software and hardware systems with regard to their reliability parameters Modern methods of functional verification RTL-models blocks for VLSI microprocessor Modern tools of compilation of device models from high level language Verilog-A to internal representation of system Spectre Modification of a High-Level NoCModel 2.0 for Modeling Networks-on-Chip with Circulant Topologies Multi-bit processors architectures: problems and solutions Multicriteria approach to automation of radio networks planning
O
	On mathematical models of digital microelectronic systems and verification of the sequence of functions performed at the design stage On one method of defining functional coverage metrics for microprocessor testing On the formal specification of digital systems Optimizational transformations of VHDL-models of digital systems Optimization for some phase of Komdiv64-RIO design flow
P
	Package ZUBR of the automated designing of digital circuits on the basis of programmed logic integrated schemes Placement of nodes in a heterogeneous network-on-crystal Possibilities of The distributed subsystem topological design, built on the basis of client-server technologies Powering the Directed VLSI Firmware and Software Testing with Data Flow Aware Limited Branch Alternation Practical Aspects of Design Verification of Complex Chips Problems of platform approach for System on Chip and IP cores test infrastructure creation and their solutions Procedure of automated MCU selection for design of electronic and computer technology products Prototyping linux kernel drivers in userspace with lua scripting language
R
	Recognition and interpretation of erroneous behavior in simulation-based hardware verification Reducing area and increasing compression ratio of scan compression system for digital VLSI using stuck-at fault model Research and Development of Digital System Block Models Based on Their Description as a Stationary Dynamical System Family Research of Various Options for Implementing Program Construction «Loop» in Dataflow Computing Model Research of hardware implementation efficiency of discovering data dependences in coprocessor's pipeline of KOMDIV128-RIO processor Research of methods and tools of verification of projects and generation of tests of microelectronic systems Research of the model of distributed topological VLSI design by means of the hierarchical client-server architecture Research the principles of operation of the input block for the parallel dataflow computing system Research ways to design a dynamic branch prediction unit for promising microprocessor development by SRISA RAS Reusable complex Soc level tests creating and debugging method Route automation of Functional Verification based on IP-XACT standard Route of designing "system-on-chip" on the basis of IP-libraries of a platform "MULTICORE" Route of effective IC development Route reconfiguration in RapidIO system in case of faulty connections
S
	SATOK - System for Self-Timed Integrated Circuits Testing Simulation at the level of transactions for system designing and debugging of systems-on-crystals Simulation modeling for survivability evaluation of digital control systems SoC focused technologies of brain-like quantum computing SoC protocols specification and validation: problems and solutions Specialized the architecture of the parallel multicore dataflow computing system for solution of task FFT Structure Formalization of Management Information System Software Support methods of reliability on the wireless sensor networks by criterion of the network load Synchronous elastic circuits design and its application for H.264 CABAC decoder performance optimization Synthesis of control devices for objects of floor automation of railway transport on FPGA Synthesis of multiprocessor computing structures based on models of models System Debugging Tools for Recurrent Computing Device SystemVerilog assertions for verification and imitating modelling SystemVerilog object-oriented programming features for functional verification of multi-core SoC
T
	Technique of characterization of ROM-compiler using controlled current sources Technology of debugging "system-on-chip" of series "MULTICORE" The Results of the Implementation of the Copy Function on a Vector Coprocessor The application and implementation issues of dataflow computing system The architecture of scheduler of mapping processor of PDCS "Buran" The capabilities of usage virtual platforms for verification of RTL-models of complex co-processor blocks The means for computation distribution in the PDCS "Buran" and the implementation variants of a block of hash-functions The method of EFSM extraction from HDL: application to functional verification The subsystem for processing structure-functional descriptions of circuits in a CAD system Tools for verification of computation distribution in the Parallel Dataflow Computing System (PDCS) “Buran” Tracing of change in a condition of dynamic object in real time with use of the microprocessor module Trends in the implementation of processor memory description and analyzers for software verification
U
	UVM using for an autonomous verification of digital hardware Universal scan based JTAG compatible VLSI debug structure Use of Formal Methods to Resolve Actual Problems of ASIC Design Verification User applications synthetic clones generation for functional verification Using Formal Coverage Analyzer for Code Coverage Improvement
V
	Verification of Memory Requests Arbitration Algorithm Verification of divers systems based on integrated circuits Virtual Tests of Micro- and Nanoelectronic Systems on External Influences