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The Results of the Implementation of the Copy Function on a Vector Coprocessor
Authors
	Aryashev S.I.
	Zubkovskiy P.S.
	Tsvetkov V.V.
Date of publication
	2018
DOI
	10.31114/2078-7707-2018-3-144-147
Abstract
	In this paper we present the results of the implementation of the copy function on a vector coprocessor. The proposed implementation supports the execution of copying arrays with different level of address alignment and automatically selects loading/saving instructions corresponding to the level of alignment of arrays. So on the arrays aligned on the boundary of the 256-bit word (align32), vector instructions vldq/vsdq are used that load/store two vectors using CACHE memory of the second level, on arrays aligned along the 128-bit word boundary (align16), vector instructions vldm/vsdm are used that load/store one vector using the first and second level cached memory. On arrays aligned on the boundary of a 64-bit or 32-bit word (align8 or align4), copying is performed through real-arithmetic coprocessor (FPU) registers using the ldc1/sdc1 or lwc1/swc1 instructions that load/store FPU registers. The testing of the copy program was performed on different versions of models and different versions of the hardware implementation of the vector coprocessor. Based on the measurement of the number of processor cycles spent on the execution of the program, the acceleration factor of the execution of the copy program on the vector coprocessor (CPV) was evaluated relative to the implementation of the program implementation on the coprocessor for real operations (FPU). The greatest acceleration is observed when using the vldq/vsdq commands on float arrays aligned on the 32-byte boundary, the maximum value of the acceleration coefficient is K = 5.5. For arrays double, the corresponding value of the acceleration coefficient is about one and a half times smaller.
Keywords
	vector coprocessor, coprocessor of real arithmetic, acceleration factor, copy function, loading instructions, save instructions.
Library reference
	Aryashev S.I., Zubkovskiy P.S., Tsvetkov V.V. The Results of the Implementation of the Copy Function on a Vector Coprocessor // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2018. Issue 3. P. 144-147. doi:10.31114/2078-7707-2018-3-144-147
URL of paper
	http://www.mes-conference.ru/data/year2018/pdf/D080.pdf