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Designing a high-performance SoC based on a 16-bit processor core
Authors
	Arkhipkin V.Ya.
	Dyabin M.I.
	Erokhin V.V.
	Leokhin Yu.L.
Date of publication
	2020
DOI
	10.31114/2078-7707-2020-4-134-139
Abstract
	This paper describes a method of designing a high-performance system on a chip for embedded usage based on a 16-bit processor core and a wide 64-bit bus. Justification of correctness of the chosen approach with regarding to using a 16-bit i80186-compatible processor core, as the base for designing a system, is given. The main merits of the chosen 16-bit architecture are listed. Including a modern processor independent AMBA AXI bus into the SoC, and also using a command cache and a data cache in the system, is founded in this paper. It is noted that the 64-bit bus and a DMA controller, adapted to this bus, contribute to increasing the system’s performance while processing huge data streams. The authors consider two variants of organizing priorities between DMA channels when more than one channel is started to work simultaneously. This paper presents using a coherence controller to provide data integrity while accessing the same data simultaneously (the procedures of writing and reading) when this data is placed in different information storages (the main RAM, the command cache, the data cache), of different active devices (the processor, the DMA channels). An example is given of organizing work of a high-performance device (namely, a cryptographic device) in the system in order to demonstrate the advantages of using a wide bus while processing huge amount of data. The authors describe the process by which the crypto device processes data using DMA channels for loading source data into the device and saving result to memory. In conclusion, the paper justifies the correctness of the chose approach for designing high-performance systems for embedded usage. The authors give a comparative evaluation of increasing the performance of the presented SoC relatively to the original microcontroller.
Keywords
	bus, pipeline, processor core, DMA controller.
Library reference
	Arkhipkin V.Ya., Dyabin M.I., Erokhin V.V., Leokhin Yu.L. Designing a high-performance SoC based on a 16-bit processor core // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2020. Issue 4. P. 134-139. doi:10.31114/2078-7707-2020-4-134-139
URL of paper
	http://www.mes-conference.ru/data/year2020/pdf/D075.pdf