| Analysis of Open-source EDA Tools OpenLANE for ASIC Design |
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| Authors |
| | Zykov A.V. |
| | Iliasov R.F. |
| Date of publication |
| | 2022 |
| DOI |
| | 10.31114/2078-7707-2022-4-87-92 |
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| Abstract |
| | The objective of this investigation is to explore the application of current open-source EDA RTL-to-GDSII ASIC design flows. The OpenLANE flow was chosen for the analysis as the currently most prominent example. This flow is actively developed, and it was used to produce real microchips through chipIgnite project. The comparison between open-source OpenLANE tools and commercial tool Cadence GENUS demonstrated higher optimization level in commercial tool. Though the result of both tools seems to be comparable enough to prove practical usefulness of the open-source OpenLANE tool chain. |
| Keywords |
| | VLSI, OpenROAD. |
| Library reference |
| | Zykov A.V., Iliasov R.F. Analysis of Open-source EDA Tools OpenLANE for ASIC Design // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2022. Issue 4. P. 87-92. doi:10.31114/2078-7707-2022-4-87-92 |
| URL of paper |
| | http://www.mes-conference.ru/data/year2022/pdf/D054.pdf |
