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Listing of all the works by years. Select the year of the conference to see a list of works this year, or select "all years". The selected set may be restricted by specifying a particular topic.

2005 2006 2008 2010 2012 2014 2016 2018 2020 2021 2022 2023 2024 all years

on topic: All topicsADC design problems Cellular automata Design of System-on-chip (SoC) and IP-blocks Design of VLSI elements Design of VLSI signal processors Design of analog and mixed functional blocks of VLSI Design of digital functional blocks of VLSI Design of fault-tolerance systems Design of micro-electromechanical systems Design of nanoelectronic devices Design of nanoelectronic devices based on Josephson junctions Design of photodetecting VLSI Design of radiation-resistant VLSI Design of technological processes Designing components for aerospace and navigation technology Genetic algorithms in VLSI CAD Methods and algorithms for automated layout design Methods for high-level simulation Methods of device technology simulation of VLSI Methods of digital information processing and digital filters Methods of electro-thermal simulation Methods of logic synthesis and functional logic simulation ... Methods of simulation of VLSI electrical characteristics Models of devices for circuit simulation Neural networks Problems of development of sensory microcircuitry Simulation of data transfer channels Study of the magnetic properties of materials Unconventional computing systems Web-based VLSI CAD design of memory cells

Selected papers: year 2022

In selection - 87 papers

A

B

C

D

E

F

G

H

I

L

M

O

P

R

S

T

W

A
	A Machine Learning-Based Switching Power Prediction at Floorplan Stage of IC Physical Design Absorption of Light by a Nanowire with Transitions of Carriers from the Valence Band to Donor States in the Presence of an Electric Field Accelerated characterization technique for multi-bit flip-flops with accuracy control Adaptive Equalization of Frequency Response of Acoustic Wave Propagation Channels in Closed Rooms An Algorithm of Building Fast Hash Functions Based on Replacement of Symbols Analysis and Parametric Optimization by Evolutionary Methods of a Turn of a Meander Microstrip Line, Taking into Account Temperature Analysis of Coupled Memristor based Oscillators using Circuit Simulators Analysis of Current-Driven Passive Mixer with Considering the Resonant Circuit of the Input Impedance Analysis of Open-source EDA Tools OpenLANE for ASIC Design Analysis of Trends in the Development of Field-Effect Transistors An integrated LDO regulator for self-powered systems Atomic force microscopy of amorphous electrotechnical alloys Fe(Ni,Cu)(SiB)
B
	Block FIR filter implementation with a data-flow recurrent signal processor
C
	Comparative Analysis of Clustering and Placement Methods for Reconfigurable System-on-Chips Complex Standard Cells Design Features in Advanced FinFET Technologies
D
	DC-DC Converter Conducted Emission Level Estimation at Design Stage Designing a Configurable 32-Bit RISC-V Microprocessor Design of High-Speed Thermocouple Sensors based on SOI Structures Development of Concurrent Error Detection Circuit Based on Automated Generation of Error-Correcting Code Development of a Digital Integrated Circuits Visualization Algorithms at the Gate Level Distributed Power Amplifiers Distribution of connections by layers in multi-layer global routing Dynamic Errors of Band-pass Bessel Filters Switched on at the ADC Input Dynamic and fluctuation errors of the one-dimensional Kalman filter
E
	Electrostatic Discharge Exposure on the Transistor in Consideration of Seat Capacitance Estimating of the Power Consumption of Combinational CMOS Circuits Based on Logic VHDL Simulation Evaluation of VLSI Ionization Response Under Pulsed Neutron Exposure Exact Synthesis of Low Precision Multipliers for Intel FPGAs
F
	FPGA System Design Using Visual Languages Fast Multipliers for Hardware Implementation of Artificial Neural Networks Functional verification of microprocessors using machine-learning methods
G
	Gallium arsenide operational amplifiers with transconductance multipliers of input differential stages Generation of Logical Function Libraries
H
	Hardware Implementation of Code Converters Designed to Reduce the Length of Binary Encoded Words Hardware Implementation of a Neural Network for Object Detection in FPGA Hardware Implementation of an Accelerated Approximated Matrix Multiplier Based on MADDNESS Algorithm Hardware implementation of an image processing application based on the "system on a chip" technology Heterojunction bipolar transistor with pnp structure in the gallium arsenide technology HBT-HEMT High-performance soft processor for embedded FPGA-based systems
I
	Implementation of Area Optimal FIR Filters Based on Lookup Tables for Sigma-Delta Modulator Signal Processing Implementation of Majority Function Based on Matching Processor in the Parallel Dataflow Computing System "Buran" Implementation of a Control Device for a Railway Switch Electric Drive on FPGA Implementation of an RNS Reverse Converter for General Moduli Sets Based on LUTs with Reference Points Improving the Analysis of the Propagation of Impulse Signals in Structures of N Cascades of Coupled Lines Improving the Efficiency of Automated Monolithic Integrated Circuits Visual Inspection Algorithm Investigation of Porous Silicon Dioxide Films Modified with Carbon Investigation of the Characteristics of the Components of Synchronization Devices for High-speed Data Transmission Systems Investigation of the corrective ability of modular codes used in AES systems
L
	Library composition optimization for self-timed circuit synthesis Linear Analysis of Diode Mixers by the Nodal Equations Method in Generalized Matrix Form in the Frequency Domain Taking into Account Capacitive Parameters
M
	Mathematical Model of the Trajectory Velocity Measurement Error by Doppler Frequency Shift Mathematical model of a cylindrical SOT-MRAM cell Method of Merging Models to Analyze the Synchronization Modes of Coupled Oscillators Methodology for the Effective Construction of Large Tables Methods for Fast Implementation of Loading in Computing Systems Microstrip directional coupler directivity improvement Modeling Technique of QFN Packages Modified Generalized Approach to Circuit Optimization
O
	On mathematical models of digital microelectronic systems and verification of the sequence of functions performed at the design stage Optimization of a Class E Power Amplifier in the Transmitting Part of an Inductive Power Transfer System Optimization of a Modal Filter on a Double-Sided PCB with Broad Side and Edge Coupling Ortogonalization of the DNF System of Boolean Function
P
	Performance Analysis of Microcontrollers with Core Cortex-M3 Planar printed antenna array for Doppler speed and drift angle meter Porous Silicon Layers for Heteroepitaxial and Composite Structure Formation
R
	Remote Stand for Synchronous Operation with FPGA-based Equipment Representation of the Matrix Architecture in the Form of a Working Field in the Problem of the Initial Placement of VLSI Components Research of Various Options for Implementing Program Construction «Loop» in Dataflow Computing Model Reverse Engineering of VLSI for Equipment Safety
S
	Scanning Probe microscopy for nanostructures investigations from micro and nanoelectronics up to biomaterials Self-Dual Control of Combinational Circuits with Using Hamming Codes Self-checking digital devices organization by Boolean complement method with Hamming codes Structural Synthesis of Allpass IIR Digital Filters Structural and technological solutions of diamond-based multi-element UV photodetectors Synthesis of multiprocessor computing structures based on models of models
T
	TCAD Simulation of the Etching of the Sacrificial Layer in the Sensitive Element of the IR Microbolometer Array Based on the SOI Structure TCAD Study of Responsivity of n-channel MOS Dosimeter Fabricated in CMOS Processes Testing Systems with Behavior Parallelism Based on a Reduced Reachability Graph The Concurrent Error-Detection Circuit Typical Structure Based on Boolean Correction and Calculations Control by Two Diagnostic Parameters in the Experiment The Extraction Problems of Strip Lines Parameters The Optimal Algorithm for Generating a Complete Test for Checking the Simplest Single Logical-Dynamic Faults for an N-Input Combinational Device The Research of Electrophysical Behavior of Infrared GaAs-, GaP- and Al0.3Ga0.7As-structures with P–N-Junction by Means of Simulation Three level logic minimization using graphics processing units Time Response Analysis of Two-Conductor and Four-Conductor Transmission Lines with Resistive Loads by Analytical Models Topological Graph Drawings Trends in the implementation of processor memory description and analyzers for software verification
W
	Wireless Power Transfer Appliance with High Resistance to Inductive Coils Displacements for Powering Implanted Medical Devices