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Themes

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Listing of works with the partition by the subject of reports. Click on the work title to see its details. The selected set may be restricted by specifying a range of conference years, or by selecting a specific topic.

Select: from 2005 2006 2008 2010 2012 2014 2016 2018 2020 2021 2022 2023 2024 to 2005 2006 2008 2010 2012 2014 2016 2018 2020 2021 2022 2023 2024 year

All topics ADC design problems Cellular automata Design of System-on-chip (SoC) and IP-blocks Design of VLSI elements Design of VLSI signal processors Design of analog and mixed functional blocks of VLSI Design of digital functional blocks of VLSI Design of fault-tolerance systems Design of micro-electromechanical systems Design of nanoelectronic devices Design of nanoelectronic devices based on Josephson junctions Design of photodetecting VLSI Design of radiation-resistant VLSI Design of technological processes Designing components for aerospace and navigation technology Genetic algorithms in VLSI CAD Methods and algorithms for automated layout design Methods for high-level simulation Methods of device technology simulation of VLSI Methods of digital information processing and digital filters Methods of electro-thermal simulation Methods of logic synthesis and functional logic simulation ... Methods of simulation of VLSI electrical characteristics Models of devices for circuit simulation Neural networks Problems of development of sensory microcircuitry Simulation of data transfer channels Study of the magnetic properties of materials Unconventional computing systems Web-based VLSI CAD design of memory cells

Selection on topic: Design of VLSI signal processors

Selected papers: from 2005 to 2024 year

In selection - 25 papers

A

B

C

D

F

H

M

N

P

R

S

T

1

A
	AFE and DFE of the receiver for the CEI-25-LR and CEI-28-MR interfaces with energy-efficiency 1,45mW/Gb/s in CMOS 28nm Analog and digital micro- and nanoelectronics circuits for communications Analysis of the Frequency Synthesizers Architecture Evolution Architectural features of VELCore-01 video processing core
B
	Bit error rate calculation in high performance communication channels Block of Fast Fourier Transformation for wireless communication systems on the basis of Block of decoder Viterbi for wireless communication systems on the basis of standard IEEE 802.16
C
	Characteristics of the "Multicore" series controllers for FFT processing signal in real time and their application in radar
D
	Design features of the multipliers on the module using advanced CAD Detector of Free Parts of Radio Frequency Spectrum Digital Signal Processor With Non-Conventional Recurrent Data-Flow Architecture Digital Television Decoder VLSI. The Technology of Design
F
	Family of domestic DSP-controllers "MultiCore" and elements of system interface "MultiCore-the designer" for construction of scaled parallel systems of teraflop productivity
H
	Hardware verification of the recurrent signal processor on FPGA
M
	Methodology of the automated designing of radio receiver devices of digital communication systems Motion Estimation IP-core Implementation for H.264 Full HD Video Codec Multiprotocol switchboards for the heterogeneous distributed onboard complexes
N
	NAND Flash memory controller IP-core New digital signal processor 1879ÂÌ4 of the NeuroMatrix® processor family
P
	Problematical questions of adaptive synthesis of radar images in bi-static and mono-static looks
R
	Recurrent data-flow architecture: features and realization problems
S
	Specialized tag transformer for recurrent signal processor Specialized the architecture of the parallel multicore dataflow computing system for solution of task FFT
T
	The project of the on-chip processor for videostream processing are developed. This project are based on Russian SIMD processor PARS
1
	1879ÕÊ1 System-on-a-Chip for digital processing of analog signals in radio systems and satellite navigation systems