| Digital Signal Processor With Non-Conventional Recurrent Data-Flow Architecture |
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| Authors |
| | Volchek V.N. |
| | Stepchenkov Yu.A. |
| | Petrukhin V.S. |
| | Prokofyev A.A. |
| | Zelenov R.A. |
| Date of publication |
| | 2010 |
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| Abstract |
| | The paper presents implementation results of the digital signal processor with nonconventional
recurrent data-flow architecture. It is considered that the computer device focused on
effective execution of digital signal processing algorithms has organization features, in addition to this architecture specificity. The paper shows that the hardware involved with this work is based on FPGA Stratix III produced by Altera, and as the design entry language VHDL is used. It is demonstrated that the synthesis efficiency of the basic functional blocks in FPGA depends on VHDL coding style.
Synthesis results are also presented. |
| Keywords |
| | Digital signal processor; DSP; data-flow architecture; recurrence; multi-core processor;
parallel computing; VHDL synthesis; FPGA. |
| Library reference |
| | Volchek V.N., Stepchenkov Yu.A., Petrukhin V.S., Prokofyev A.A., Zelenov R.A. Digital Signal Processor With Non-Conventional Recurrent Data-Flow Architecture // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2010. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2010. P. 412-417. |
| URL of paper |
| | http://www.mes-conference.ru/data/year2010/papers/m10-134-66131.pdf |
