Listing of all the works of the author. Click on the work title to get the full information.
| 2005 | |
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Glushkov A.V., Belyaev A.A., Putrya F.M., Alekseev I.N., Mironova Yu.V.
“MULTICORE” platform IP-library of SoC peripherals
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| 2006 | |
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Putrya F.M.
Optimization of structure of controllers of serial buses. The solution of problems of lack of pins of a integrated circuit and loading of the processor at data transmission
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| 2008 | |
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Putrya F.M.
Method of automation of process of development of the crossbar for multicore system whith nonuniform memory access
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Putrya F.M.
Research, development and optimization of data exchange hardware in multicore computing systems
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| 2010 | |
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Putrya F.M., Medvedev I.A.
Hardware streams synchronization methods for multicore cluster
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| 2012 | |
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Putrya F.M.
SystemVerilog object-oriented programming features for functional verification of multi-core SoC
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| 2014 | |
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Bezglasnaya K.A., Kolbasov Y.S., Medvedev I.A., Putrya F.M.
Problems of platform approach for System on Chip and IP cores test infrastructure creation and their solutions
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Golovina E., Makeeva M., Nikolaev A.V., Putrya F.M., Smirnov A.A.
Reusable complex Soc level tests creating and debugging method
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Medvedev I.A., Putrya F.M.
Interconnect Verification Methods Based on Unified Test Infrastructure
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| 2016 | |
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Zhezlov K.A., Kolbasov Y.S., Kozlov A.O., Nikolaev A.V., Putrya F.M., Frolova S.E.
Automation of verification environments development process providing a through design flow for design, verification and research of IP-blocks and SoC
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| 2018 | |
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Garashchenko A.V., Nikolaev A.V., Putrya F.M., Sardaryan S.S.
System of Combined Specialized Test Generators for the New Generation of VLIW DSP Processors with Elcore50 Architecture
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| 2020 | |
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Nikitin S.A., Nikolaev A.V., Putrya F.M., Neklyudov I.A.
Route automation of Functional Verification based on IP-XACT standard
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| 2021 | |
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Zhezlov K.A., Belyaev A.A., Putrya F.M.
Implementation of Methodology of SoC Interconnects Automated Performance Analysis into the Verification Route
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