Home         Authors   Papers   Year of conference   Themes   Organizations        To MES conference

Year of conference

Listing of all the works by years. Select the year of the conference to see a list of works this year, or select "all years". The selected set may be restricted by specifying a particular topic.

2005 2006 2008 2010 2012 2014 2016 2018 2020 2021 2022 2023 2024 all years
 
on topic:
Selected papers: year 2005
In selection - 79 papers
A C D E F G H L M N O P R S T U
A 
 
Adaptation of performance tests for the 64-bit universal superscalar microprocessor
Adaptive method of harmonic balance
Alarm controllers MS-0226 and ÌÑ-0226G on the basis of platform "MULTICORE"
Analog-digital "system-on-chip" MF01 of series "Multiflex"
Analog-digital "system on crystal" peripheral controller MCT-01 on the basis of IP-libraries of a platform "MULTICORE"
Analog simulation tools and their role in modern designing integrated circuits
Application of packages of plate support as the tool of adaptation of specialized operational systems for functioning on platform "MULTICORE"
Architecture of domestic IC series of type "system or network on chip" on the basis of IP-libraries of platform "MULTICORE"
Architecture of the unified computing block for contactless photon system of measurement of parameters of a rail track
Architecture validation tests for RTL-model of 64-bit superscalar microprocessor
Automation of synthesis of VHDL-AMS models for the mixed and analog behavioural simulation
C 
 
CELLERITY: THE SYSTEM OF AUTOMATIC SYNTHESIS OF STANDARD CELL LAYOUT
Common approaches to the FPU verification
Complex platform of functional verification of Mentor Graphics
Configurable IP-cores architecture analysys using criterion of implementation ability in “MULTICORE” platform IP-library
Criteria of a choice of models at calculation of device characteristics of submicronic transistor structures
D 
 
Debugging and testing of VLSI models with use of the prototypes realized on PLIC
Debugging of the block of transformation of addresses of the microprocessor
Decomposition on the basis of universal systems of functions and its application at logic and topological VLSI synthesis
Delay noise analysis, using graph of constraint pairs
Design and development of SOI CMOS OA
Designing PLL-blocks for systems of synchronization of integrated devices of information processing
Designing of CMOS linear and matrix transformers of the X-ray image with the active sensor cells
Designing of a universal analog kernel of sigma-delta ADC of a sound range
Designing of custom-made blocks taking into account extraction RC parasitic parameters
Development and researches of modern linear photosensitive devices with CCD
Development of an optimum design of a magnetic field sensor on the basis of lateral magnetic transistor using tools of device technological simulation
Development of integral digital filters for sigma-delta converters using MATLAB
Development of precision digital-to-analog PLL devices and tools of their computer simulation
Device-technological simulation of SiGe bipolar and MOS transistor VLSI structures
Digital kernels of sigma-delta ADC/DAC and technology of their designing
E 
 
Efficiency of adaptive signal processing algorithms implementation on basis of MULTICORE SoC
Evolutionary routing in the channel on the basis of symbolical representations
Experience in Self-Timed Microcontroller Core Design on Basic Gate-Array
Experience of application of IP - blocks
Experience of application of a reduction of parasitic elements with use of subspace Krylov methods
Experience of designing built-in means and methods of characteristics measurement concerning microelectronic systems
Experience of development and methodology of designing mixed MES on an example high-speed 10-digit ADC
Experience of development of CCD matrix photoreceivers with interlower case carry
F 
 
Fault tolerance increasing for access to network resources of MULTICORE series SoC for transparently distributed applications
G 
 
Graphs of communications and placement of nodes in "networks-on-chip"
H 
 
Heuristics of netless final layout of unrouted nets in the commutational block
High-speed modules of integer division
L 
 
Layout of microelectronic means on the basis of the multilevel approach
Library of applied functions in structure of MCStudio™ environment for development of the software "system-on-chip" of series "MULTICORE"
M 
 
“MULTICORE” platform IP-library of SoC peripherals
MCam-01 mixed signal multimedia processor
Method of optimum curtailing of the scheme. The effective approach for the qualitative solution for non-polynomial combinatory problems of the large and superlarge dimensions in automated designing microelectronic devices
Method of simulation of dynamics of technical systems on the basis of formal schemes
Methodology of designing of specialized calculators on the basis of the automated generation of technologically independent IP-blocks
Methodology of the automated designing of radio receiver devices of digital communication systems
Methods of increase of productivity of the superscalar RISC-processor
Methods of statistical timing analysis of digital circuits
Methods of the parasitic extraction of interconnect in the integral circuits
N 
 
Noise analysis of digital circuits with accounting of logic constraints
Normative documents for designing "system-on-chip" and IP-blocks
Numerical Simulation of Photosensitive VLSI Pixels
O 
 
Organization of instruction pipeline in ELcore-õxTM DSP-cores of “MULTICORE” IP-library
P 
 
Peripheral analog-digital blocks for CMOS VLSI of type "system-on-chip"
Photosensitive CCD: state-of-the-art and development perspectives
Principles of construction of specialized calculators based on residual arithmetics
Problems of creation of computers of series "Baguet" for problems with increased requirements to reliability of long-term functioning
Problems of using device-technological simulation as tool of designing and ways of their solution
R 
 
Route of designing "system-on-chip" on the basis of IP-libraries of a platform "MULTICORE"
Route of development and FPGA-verifications of IP-core of controller SpaseWire link for "system-on-chip" on the basis of platform "MultiCore"
Route of effective IC development
S 
 
SPICE models of optoelectronic elements for simulation of photosensitive PD-CMOS VLSI
SRAM memory controller to maximize switch performance
Self-testing of complex functional blocks
Simulation of SEU failures in submicronic SoS CMOS cells of memory in view of temperature effects
Simulation of transistor structures of power electronics
System of Compaction and Migration of Standard Cell Layouts
T 
 
Technology of debugging "system-on-chip" of series "MULTICORE"
Tendencies of development of crystal CAD systems
The advanced algorithms of comparison of graphs of electric circuits
The block of self-testing of internal memory
The environment of development of the software for "system-on-chip" of series "MULTICORE" MCStudio_Lnx
To creation of the domestic concept of systems on a crystal
U 
 
Using TCAD in designing the planar powerful MOS-transistors having the raised breaking-down voltage in the off-state

Copyright © 2009-2024 IPPM RAS. All Rights Reserved.

Design of site: IPPM RAS