Listing of all the works of the organization. Click on the work title to get the full information.
2010 | |
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Panfilov A.P., Kosorukov D.E., Eisymont A.L., Osipov V.G., Chernikov V.M., Viksne P.E., Shelukhin A.M. 1879ÕÊ1 System-on-a-Chip for digital processing of analog signals in radio systems and satellite navigation systems
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Shevchenko P.A. Digital Television Decoder VLSI. The Technology of Design
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Chernikov V.M., Viksne P.E., Shelukhin A.M., Chernikov A.V., Kosorukov D.E. New digital signal processor 1879ÂÌ4 of the NeuroMatrix® processor family
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Mironov N.Yu., Bojnov V.N. Radiation tolerant Hybrid for Multiplex Data Bus(RU Standard GOST R 52070-2003). New opportunities for spaceborne computers
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2014 | |
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Nasonov I.I., Panfilov A.P., Eisymont A.L., Dryagalkin D.I. Communication fabric IP-core for a system-on-chip
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Dergachev P.N., Filimonova I.P., Shevchenko P.A. Key features of static timing analysis and SDC development for complex system-on-chip ASIC with multiple asynchronous clock domains
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Andrianov A.V. Prototyping linux kernel drivers in userspace with lua scripting language
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2016 | |
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Shchigorev L.A. Built-in self-repair for SRAM with redundant elements
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Mushkaev S.V., Andrianov A.V. Hybrid method of memory allocating in multibank platforms based on the DSP NeuroMatrix architecture
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Dementev V.V. System level design of the DSP processor IP-core with NeuroMatrix architecture
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2018 | |
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Andrianov A.V. Methods of Achieving Test Scenario Portability Between Different Verification Environments
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Shchigorev L.A. Structure and Algorithm Development of Built-in Self-repair for SRAM
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2020 | |
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Shchigorev L.A., Shagurin I.I. Methods for eliminating SRAM soft and hard errors
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