Home
Authors Papers Year of conference Themes Organizations To MES conference
Listing of all the works of the author. Click on the work title to get the full information.
2005 | |
| |
Belyaev A.A., Solokhina T.V., Glushkov A.V., Aleksandrov Yu.N., Petrichkovich Ya.Ya., Mironova Yu.V., Gerasimov Yu.M. MCam-01 mixed signal multimedia processor
|
| |
Goussev V.V., Enin S.V., Lihih S.N., Lavlinsky S.A., Menyajlov D.E., Petrichkovich Ya.Ya., Skok D.V., Solokhina T.V., Smirnova I.I., Sudnev E.N., Gerasimov Yu.M. Analog-digital "system-on-chip" MF01 of series "Multiflex"
|
| |
Solokhina T.V., Petrichkovich Ya.Ya., Glushkov A.V. Architecture of domestic IC series of type "system or network on chip" on the basis of IP-libraries of platform "MULTICORE"
|
| |
Glushkov A.V., Solokhina T.V., Petrichkovich Ya.Ya. Alarm controllers MS-0226 and جر-0226G on the basis of platform "MULTICORE"
|
2006 | |
| |
Glushkov A.V., Solokhina T.V., Petrichkovich Ya.Ya., Gorbachev S.V., Suvorova E.A., Shejnin Yu.E. Multiprotocol switchboards for the heterogeneous distributed onboard complexes
|
| |
Solokhina T.V., Glushkov A.V., Petrichkovich Ya.Ya., Grishin V.Yu., Eremeev P.M., Sirenko V.G., Shejnin Yu.E. Family of domestic DSP-controllers "MultiCore" and elements of system interface "MultiCore-the designer" for construction of scaled parallel systems of teraflop productivity
|
2008 | |
| |
Gerasimov Yu.M., Glushkov A.V., Grigoryev N.G., Petrichkovich Ya.Ya., Solokhina T.V. Features of designing of radiation-proof libraries of elements, complex-functional blocks and nano-VLSI SoC
|
2014 | |
| |
Belyaev A.A., Gavrilov V.S., Kuznetsov D.A., Petrichkovich Ya.Ya., Solokhina T.V., Frolov D.S., Funkner A.A. Evolution in the area of multicore heterogeneous video data processing systems
|
| |
Gerasimov Yu.M., Grigoryev N.G., Goussev V.V., Kobylyatskiy A.V., Petrichkovich Ya.Ya. Radiation-hardned CMOS VLSI SRAM in bulk technology
|
2021 | |
| |
Belyaev A.A., Belyaev I.A., Petrichkovich Ya.Ya. Parameterizable matrix multiplier of fixed-point binary numbers in direct and complementary code
|
| |
Belyaev A.A., Belyaev I.A., Petrichkovich Ya.Ya., Poperechny P.S. High-performance parallel BCH encoder with reconfigurable correction capability
|
|
|
|