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| Radiation-hardned CMOS VLSI SRAM in bulk technology |
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| Authors |
| | Gerasimov Yu.M. |
| | Grigoryev N.G. |
| | Goussev V.V. |
| | Kobylyatskiy A.V. |
| | Petrichkovich Ya.Ya. |
| Date of publication |
| | 2014 |
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| Abstract |
| | Architectural, schematic and constructive layout RHBD methods, applied in a bulk 250…90-nm CMOS VLSI RAM and IP-blocks, were analyzed. It was shown that radiation-tolerant bulk RAM for space applications has the same or even best parameters of tolerance in comparison with SOI technology, moreover, process ability, cost and operating speed of such RAM is higher.
The results were obtained from the design and research of a bulk 250…130-nm CMOS RAM 4 Mbit and 16 Mbit and IP-blocks. |
| Keywords |
| | CMOS VLSI RAM, IP-blocks, RHBD |
| Library reference |
| | Gerasimov Yu.M., Grigoryev N.G., Goussev V.V., Kobylyatskiy A.V., Petrichkovich Ya.Ya. Radiation-hardned CMOS VLSI SRAM in bulk technology // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2014. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2014. Part 3. P. 171-176. |
| URL of paper |
| | http://www.mes-conference.ru/data/year2014/pdf/D090.pdf |
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