Listing of all the works of the organization. Click on the work title to get the full information.
| 2005 | |
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Ivanov A.A., Spitsyn V.Yu., Tian M.
Analog simulation tools and their role in modern designing integrated circuits
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Potyagalova A.S., Soltan I.E., Tkachev D.F., Khapaev M.M.
Experience of application of a reduction of parasitic elements with use of subspace Krylov methods
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Bezrukov A.E., Rusakov A.S., Tkachev D.F., Khapaev M.M.
Methods of the parasitic extraction of interconnect in the integral circuits
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Datsuk A.M., Marchuk V.I.
The advanced algorithms of comparison of graphs of electric circuits
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| 2006 | |
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Khapaev M.M.
Calculation 2D inductance for extraction problems
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Datsuk A.M., Tsvetkov A.V.
Determination and comparison of M-factor for devices with the type defined by the user (GENERIC)
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Sukharev S.A., Spitsyn V.Yu., Yusim I.E.
Modern tools of compilation of device models from high level language Verilog-A to internal representation of system Spectre
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Bojko A.Ya., Bezrukov A.E., Rusakov A.S., Tkachev D.F., Khapaev M.M.
New Algorithm for the 2D Capacitance calculation in the interconnect parasitic extraction problem
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| 2008 | |
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Rusakov A.S., Khapaev M.M.
Accuracy Improvement of the Interconnect Parasitic Capacitance Extraction
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Khapaev M.M., Kupriyanov M.Yu.
Calculation of inductance in problems of designing superconductive microelectronic structures
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Potyagalova A.S., Nechepurenko Yu.M.
The general properties and modifications of reduction algorithms
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