Listing of all the works of the organization. Click on the work title to get the full information.
| 2005 | |
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Chernyj A.I., Bogatyrev V.N., Povarnitsyna Z.M., Petrosyants K.O., Kharitonov I.A., Karelin A.A.
Design and development of SOI CMOS OA
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Sambursky L.M.
SPICE models of optoelectronic elements for simulation of photosensitive PD-CMOS VLSI
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| 2008 | |
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Petrosyants K.O., Ryabov N.I., Kharitonov I.A., Kozynko P.A.
Electro-thermal simulation process implementation in Mentor Graphics IC Station
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Kharitonov I.A., Petrosyants K.O., Orekhov E.V., Yatmanov A.P., Sambursky L.M.
Process and device simulation of CMOS SOI VLSI elements with an account for radiation effects
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| 2012 | |
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Petrosyants K.O., Kharitonov I.A., Adonin A.S., Sidorov A.V., Aleksandrov A.V.
Digital circuit IBIS-models generation with account for temperature and radiation
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Petrosyants K.O., Kharitonov I.A., Orekhov E.V., Sambursky L.M., Yatmanov A.P., Voevodin A.V.
Investigation of single event upset reliability for SOI CMOS SRAM cells using mixed-mode 3D TCAD-SPICE simulation
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| 2018 | |
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Shchegoleva M.A., Romanov A.
Development of Routing Algorithms in Networks on Chip with a Multiplicative Circulant Topology
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Petrosyants K.O., Ismail-zade M.R., Sambursky L.M., Kharitonov I.A.
SPICE-Models of Field-Effect Transistors with MOSFET and JFET Structures in the Temperature Range down to –200°C
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Kharitonov I.A.
SPICE Simulation of CMOS Circuits Behavior for Extreme Ambient Applications Using “Electro-Thermo-Rad” models
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| 2020 | |
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Petrosyants K.O., Kharitonov I.A.
An improved procedure for electro-thermal simulation of the characteristics of Bi-CMOS-DMOS IC output stages
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Prilepko P.M., Romanov A., Lezhnev E.V.
Modification of a High-Level NoCModel 2.0 for Modeling Networks-on-Chip with Circulant Topologies
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Petrosyants K.O., Popov D.A., Ismail-zade M.R., Sambursky L.M., Bo Li, Wang Y.C.
TCAD and SPICE Models for Account of Radiation Effects in Nanoscale MOSFET Structures
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| 2021 | |
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Lezhnev E.V.
Automation of Low-Level Modeling of Networks-on-Chip
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Petrosyants K.O., Silkin D.S., Popov D.A.
Comparison of MOSFET and FinFET thermal characteristics
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Myachin N.M., Romanov A., Monakhova E.A.
Deadlock-Free Routing in Networks on Chip with Circulant Topologies
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Kharitonov I.A.
Expansion of SPICE Simulation Tools Abilities by Taking into Account MOS Circuits Aging Effects Caused by Hot Carriers, Gate Dielectric Breakdown and Electromigration
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Zunin V.V., Romanov A.
Intel OpenVINO™ Toolkit: Performance Analysis of Generative Adversarial Neural Networks
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Rzaev E.R., Romanov A.
Research of Promising Network-on-Chip Topologies: application of root and direct products of Paley graphs
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| 2022 | |
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Izmailova L.G., Belorukov A.M., Romanov A.
Remote Stand for Synchronous Operation with FPGA-based Equipment
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