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Freescale Semiconductor

Listing of all the works of the organization. Click on the work title to get the full information.

2005 
  Gourary M.M., Rusakov S.G., Ulyanov S.L., Zharov M.M., Mulvaney B.J.
Adaptive method of harmonic balance
  Zinchenko L.A., Mazias R.L., Rozenfeld V.P., Smirnov Yu.G., Sotnikov M.A., Stoyanov S.V., Topuzov I.G., Falkovsky K.D.
CELLERITY: THE SYSTEM OF AUTOMATIC SYNTHESIS OF STANDARD CELL LAYOUT
  Rozenfeld V.P., Sotnikov M.A., Topuzov I.G., Ulukhanov E.A., Shiro E.G.
System of Compaction and Migration of Standard Cell Layouts
2006 
  Mukhanov K.S., Sotnikov M.A.
Algorithm for Constructing Voronoi Diagram of Orthogonal Polygons in Linf-metric
  Gourary M.M., Ulyanov S.L., Mulvaney B.J.
The simulation method of nonlinear distortion of radio frequency circuits with digital modulation in circuit simulators
  Mukhanov K.S., Sotnikov M.A., Ulukhanov E.A.
Yield enhancement of standard cell layout
2008 
  Mukhanov K.S., Sotnikov M.A.
DFM Improvement of Hierarchical Layouts
  Rozenfeld V.P., Zinchenko L.A., Mazias R.L., Smirnov Yu.G., Somov S.V., Topuzov I.G.
Synthesis of topology of standard CMOS cells taking into account effect of electromigration
2010 
  Mukhanov K.S., Sotnikov M.A.
Electromigration Tolerance Improvement in Standard Cells
  Makarov A.B., Kochkin I.P.
Technology migration of CMOS band gap voltage reference
2012 
  Rozenfeld V.P., Smirnov Yu.G., Mazias R.L., Zhuravlev A.V.
Automatic layout synthesis of standard cell layouts based on re-using existing transistor placement patterns and routing patterns
  Shiro G. E., Shiro E.G.
Low-discharge fully-coded multiplier for radar image synthesis systems
 

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