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Kharitonov I.A.

National Research University Higher School of Economics

Listing of all the works of the author. Click on the work title to get the full information.

2005
		Chernyj A.I., Bogatyrev V.N., Povarnitsyna Z.M., Petrosyants K.O., Kharitonov I.A., Karelin A.A. Design and development of SOI CMOS OA
2008
		Kharitonov I.A., Petrosyants K.O., Orekhov E.V., Yatmanov A.P., Sambursky L.M. Process and device simulation of CMOS SOI VLSI elements with an account for radiation effects
		Petrosyants K.O., Ryabov N.I., Kharitonov I.A., Kozynko P.A. Electro-thermal simulation process implementation in Mentor Graphics IC Station
2012
		Petrosyants K.O., Kharitonov I.A., Orekhov E.V., Sambursky L.M., Yatmanov A.P., Voevodin A.V. Investigation of single event upset reliability for SOI CMOS SRAM cells using mixed-mode 3D TCAD-SPICE simulation
		Petrosyants K.O., Kharitonov I.A., Adonin A.S., Sidorov A.V., Aleksandrov A.V. Digital circuit IBIS-models generation with account for temperature and radiation
2018
		Kharitonov I.A. SPICE Simulation of CMOS Circuits Behavior for Extreme Ambient Applications Using “Electro-Thermo-Rad” models
		Petrosyants K.O., Ismail-zade M.R., Sambursky L.M., Kharitonov I.A. SPICE-Models of Field-Effect Transistors with MOSFET and JFET Structures in the Temperature Range down to –200°C
2020
		Petrosyants K.O., Kharitonov I.A. An improved procedure for electro-thermal simulation of the characteristics of Bi-CMOS-DMOS IC output stages
2021
		Kharitonov I.A. Expansion of SPICE Simulation Tools Abilities by Taking into Account MOS Circuits Aging Effects Caused by Hot Carriers, Gate Dielectric Breakdown and Electromigration