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Sysoeva O.V.

NIISI RAS

Listing of all the works of the author. Click on the work title to get the full information.

2005 
  Aryashev S.I., Rogatkin B.Yu., Sysoeva O.V.
Debugging of the block of transformation of addresses of the microprocessor
2012 
  Buyakova O.N., Kirichenko P.G., Osina S.E., Sysoeva O.V., Tarasov I.V.
Register file base elements and design flow development for SOI 0.25-micron technology
2014 
  Sysoeva O.V., Agafonov A.E., Kirichenko P.G.
Spread spectrum clock generator design methods
2018 
  Larionov A.V., Buyakova O.N., Sysoeva O.V., Osina S.E., Zadiabin S.O., Aleksan P.A., Tarasov I.V., Rogatkin Yu.B., Masterov V.V.
A 4-channel Multi-standard Adaptive Serial Transceiver for the Range 1.25-10.3Gb/s in CMOS 65nm
2020 
  Larionov A.V., Buyakova O.N., Sysoeva O.V., Osina S.E.
AFE and DFE of the receiver for the CEI-25-LR and CEI-28-MR interfaces with energy-efficiency 1,45mW/Gb/s in CMOS 28nm
 

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