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Morozov N.V.

Federal Research Center “Computer Science and Control” of the RAS

Listing of all the works of the author. Click on the work title to get the full information.

2006 
  Petrukhin V.S., Stepchenkov Yu.A., Morozov N.V., Stepchenkov D.Yu.
SATOK - System for Self-Timed Integrated Circuits Testing
  Stepchenkov Yu.A., Diachenko Yu.G., Grinfeld F.I., Morozov N.V., Plekhanov L.P., Denisov A.N., Filimonenko O.P., Fomin Yu.P.
A Library of Self-Timed Elements or ASIC-Technology
  Rozhdestvenskij Yu.V., Morozov N.V., Stepchenkov Yu.A., Rogdestvenskene A.V.
ASIAN - Self-Timed Logic Circuits Analysis Subsystem
2008 
  Diachenko Yu.G., Rozhdestvenskij Yu.V., Morozov N.V., Stepchenkov D.Yu.
Quasi Self-Timed Computing Device: Practical Implementation
2010 
  Stepchenkov Yu.A., Diachenko Yu.G., Rozhdestvenskij Yu.V., Morozov N.V., Stepchenkov D.Yu.
Self-Timed Computing Device for High-Reliable Applications
  Rozhdestvenskij Yu.V., Morozov N.V., Rogdestvenskene A.V.
ASPECT – a Subsystem of Event Analysis of Self-Timed Circuits
  Diachenko Yu.G., Stepchenkov D.Yu., Morozov N.V.
Characterization of pseudodynamic elements
2014 
  Stepchenkov Yu.A., Rozhdestvenskij Yu.V., Diachenko Yu.G., Morozov N.V., Stepchenkov D.Yu., Surkov A.V.
Speed-Independent Fused Multiply-Add Unit of Gigaflops Rating: Implementation Variants
  Stepchenkov D.Yu., Petrukhin V.S., Morozov N.V.
System Debugging Tools for Recurrent Computing Device
2016 
  Stepchenkov Yu.A., Rozhdestvenskij Yu.V., Diachenko Yu.G., Morozov N.V., Stepchenkov D.Yu., Stepanov B.A., Djachenko D.Yu., Rogdestvenskene A.V.
Self-Timed Floating Point Multiply-Add Unit
2018 
  Sokolov I.A., Rozhdestvenskij Yu.V., Diachenko Yu.G., Stepchenkov Yu.A., Morozov N.V., Stepchenkov D.Yu., Djachenko D.Yu.
Delay-Insensitive Floating Point Multiply-Add-Subtract Unit
2020 
  Rozhdestvenskij Yu.V., Stepchenkov Yu.A., Diachenko Yu.G., Morozov N.V., Stepchenkov D.Yu., Djachenko D.Yu.
Self-Timed Multiplier Performance Improvement Technique
  Stepchenkov Yu.A., Diachenko Yu.G., Rozhdestvenskij Yu.V., Morozov N.V., Stepchenkov D.Yu., Djachenko D.Yu.
Hardening Self-Timed Circuit Indication against Soft Errors
2021 
  Diachenko Yu.G., Stepchenkov Yu.A., Rozhdestvenskij Yu.V., Morozov N.V., Stepchenkov D.Yu., Rogdestvenskene A.V.
Improvement of Ternary Self-Timed Multiplier Soft Error Tolerance
  Diachenko Yu.G., Stepchenkov Yu.A., Morozov N.V., Khilko D.V., Stepchenkov D.Yu., Shikunov Yu.I.
Hardware verification of the recurrent signal processor on FPGA
 

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