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Zhezlov K.A.

Electronic VLSI Engineering & Embedded Systems (ELVEES) R&D Center of Microelectronics

Listing of all the works of the author. Click on the work title to get the full information.

2016
		Zhezlov K.A., Kolbasov Y.S., Kozlov A.O., Nikolaev A.V., Putrya F.M., Frolova S.E. Automation of verification environments development process providing a through design flow for design, verification and research of IP-blocks and SoC
2020
		Zhezlov K.A. The methodology of automated performance analysis of SoC interconnect subsystems, according to the SoC structure and application
2021
		Zhezlov K.A., Belyaev A.A., Putrya F.M. Implementation of Methodology of SoC Interconnects Automated Performance Analysis into the Verification Route