Listing of all the works of the organization. Click on the work title to get the full information.
| 2010 | |
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Vetoshkin A.A.
SystemVerilog assertions for verification and imitating modelling
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| 2012 | |
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Isaev M.V., Kozhin A.S., Kostenko V.O., Polyakov N.Y., Sakhin Yu.H.
Dual-Core Heterogeneous System-on-Chip “Elbrus-2S+”
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Moroz Y.N.
Peculiarities in methods of designing power supply systems in high-performance microprocessors at the stage of physical design of the crystal
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Shmelyov V.A., Stotland I.A.
Standalone verification of microprocessors using reference models with various levels of abstraction
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Rovnyagin M.M.
UVM using for an autonomous verification of digital hardware
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| 2014 | |
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Yurlin S.V., Bychkov I.N.
FPGA prototyping for functional verification of multi-core processors
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Potovin Y.M., Soin S.
High-speed content addressable memory block design
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| 2016 | |
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Kamkin A.S., Burenkov V.S.
A Method for Scalable Verification of PROMELA Models of Cache Coherence Protocols
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Kozhin A.S., Alfonso D.M., Demenko R.V., Kozhin E.S., Kolychev R.E., Kostenko V.O., Polyakov N.Y., Smirnova E.V., Smirnov D.A., Smolyanov P.A., Tikhorskiy V.V.
Elbrus-8C: the first Russian 28 nm 8-core processor
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Yurlin S.V.
The implementation of channels of DDR4 RAM for microprocessor "Elbrus-8Ń2"
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| 2018 | |
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Petrov A.N., Yurlin S.V.
Development of FPGA Project for Microprocessor Prototype Module
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Ivanov A.A., Yurlin S.V.
Engineering Systems of Emulation Modules in KUB-PRO Form-factor
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Yurlin S.V.
Technologies for Building Scalable Prototypes of Server Microprocessors
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| 2020 | |
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Petrov A.N., Yurlin S.V.
Adaptation process of System-on-a-Chip RTL-description for distributed emulation system
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Nedbailo Yu.A.
Analysing Chip Multiprocessor Scalability Using Trace-Based Simulation
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Naumenko A.A., Vorobev A.S.
Calculation of Electrical Characteristics of Power Supply Buses in the Commutation Board of a Microprocessor
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