| Standalone verification of microprocessors using reference models with various levels of abstraction |
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| Authors |
| | Shmelyov V.A. |
| | Stotland I.A. |
| Date of publication |
| | 2012 |
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| Abstract |
| | In this paper specific characteristics of standalone microprocessor verification are discussed and a classification of microprocessor modules based on its functional features is proposed. Basic approaches for verification of each class of modules are described. Testbench architectures using a cycle-accurate or transaction level model are proposed and justified. The results of practical implementation of discussed approaches are also provided. |
| Keywords |
| | standalone verification, testbench, reference model, pipeline, microprocessor, OVM, TLM. |
| Library reference |
| | Shmelyov V.A., Stotland I.A. Standalone verification of microprocessors using reference models with various levels of abstraction // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2012. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2012. P. 435-440. |
| URL of paper |
| | http://www.mes-conference.ru/data/year2012/pdf/D137.pdf |
