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Freescale Semiconductor
Listing of all the works of the organization. Click on the work title to get the full information.
2005 | |
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Gourary M.M., Rusakov S.G., Ulyanov S.L., Zharov M.M., Mulvaney B.J. Adaptive method of harmonic balance
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Zinchenko L.A., Mazias R.L., Rozenfeld V.P., Smirnov Yu.G., Sotnikov M.A., Stoyanov S.V., Topuzov I.G., Falkovsky K.D. CELLERITY: THE SYSTEM OF AUTOMATIC SYNTHESIS OF STANDARD CELL LAYOUT
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Rozenfeld V.P., Sotnikov M.A., Topuzov I.G., Ulukhanov E.A., Shiro E.G. System of Compaction and Migration of Standard Cell Layouts
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2006 | |
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Mukhanov K.S., Sotnikov M.A. Algorithm for Constructing Voronoi Diagram of Orthogonal Polygons in Linf-metric
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Gourary M.M., Ulyanov S.L., Mulvaney B.J. The simulation method of nonlinear distortion of radio frequency circuits with digital modulation in circuit simulators
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Mukhanov K.S., Sotnikov M.A., Ulukhanov E.A. Yield enhancement of standard cell layout
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2008 | |
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Mukhanov K.S., Sotnikov M.A. DFM Improvement of Hierarchical Layouts
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Rozenfeld V.P., Zinchenko L.A., Mazias R.L., Smirnov Yu.G., Somov S.V., Topuzov I.G. Synthesis of topology of standard CMOS cells taking into account effect of electromigration
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2010 | |
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Mukhanov K.S., Sotnikov M.A. Electromigration Tolerance Improvement in Standard Cells
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Makarov A.B., Kochkin I.P. Technology migration of CMOS band gap voltage reference
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2012 | |
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Rozenfeld V.P., Smirnov Yu.G., Mazias R.L., Zhuravlev A.V. Automatic layout synthesis of standard cell layouts based on re-using existing transistor placement patterns and routing patterns
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Shiro G. E., Shiro E.G. Low-discharge fully-coded multiplier for radar image synthesis systems
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