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Aryashev S.I.

NIISI RAS

Listing of all the works of the author. Click on the work title to get the full information.

2005
		Aryashev S.I., Rogatkin B.Yu., Sysoeva O.V. Debugging of the block of transformation of addresses of the microprocessor
		Antonov S.V., Aryashev S.I. Route of effective IC development
		Aryashev S.I., Kornilenko A.V., Chekunov A.V. Debugging and testing of VLSI models with use of the prototypes realized on PLIC
		Aryashev S.I., Zubkovskiy P.S., Nikolina N.V., Chibisov P.A. Common approaches to the FPU verification
		Aryashev S.I., Barskikh M.E., Bychkov K.S. Methods of increase of productivity of the superscalar RISC-processor
		Aryashev S.I., Nikolina N.V., Chibisov P.A. Architecture validation tests for RTL-model of 64-bit superscalar microprocessor
		Aryashev S.I., Krasnyuk A.A., Chibisov P.A. Adaptation of performance tests for the 64-bit universal superscalar microprocessor
2006
		Aryashev S.I., Bobkov S.G., Zubkovskiy P.S. 64-bit superscalar embedded RISC microprocessor
2010
		Zubkovskiy P.S., Ivasyuk E.V., Aryashev S.I. Complex arithmetic coprocessor
		Arakelov A.A., Aryashev S.I., Kabirov R.Sh. Virtualizing IO devices
2012
		Nikolina N.V., Chibisov P.A., Aryashev S.I. Modern trends in evaluating and monitoring of microprocessor performance at the design stage
2014
		Aryashev S.I., Bobkov S.G., Sayapin P.V. Methodology of the optimization and efficiency evaluation for the Secondary Cache
		Barskikh M.E., Aryashev S.I., Rogatkin B.Yu. Modern methods of functional verification RTL-models blocks for VLSI microprocessor
		Aryashev S.I., Barskikh M.E., Bobkov S.G., Zubkovskiy P.S., Ivasyuk E.V. Implementation of the combustion problem main functions based on specialized vector coprocessor FMA operations
2016
		Aryashev S.I., Bychkov K.S. Optimizing the prefetch mechanism in the secondary cache memory
2018
		Aryashev S.I., Zubkovskiy P.S., Tsvetkov V.V. The Results of the Implementation of the Copy Function on a Vector Coprocessor
2020
		Aryashev S.I., Zubkovskiy P.S., Tsvetkov V.V. Implementation of functions of the linear algebra subroutines on a vector coprocessor for unaligned arrays