Home         Authors   Papers   Year of conference   Themes   Organizations        To MES conference

IP-Core "ACC_Cores" as part system-on-chip. Multifunctional hardware accelerator Fast Fourier Transform - FFT_RT_Core
Authors
	Frolov D.S.
	Pirogov P.P.
	Aleksandrov Yu.N.
	Gribov Yu.I.
	Belyaev A.A.
Date of publication
	2014
Abstract
	This article presents the architecture of IP-block hardware accelerators, providing parallel and non-conflict work of several units of accelerators. The article also shows the implementation of hardware accelerator unit, acting as a Fast Fourier Transform. A comparative analysis with other implementations of hardware accelerators that function.
Keywords
	IP-Core hardware accelerators, FFT, Fast Fourier Transform, Radix-4, DSP, digital signal processing.
Library reference
	Frolov D.S., Pirogov P.P., Aleksandrov Yu.N., Gribov Yu.I., Belyaev A.A. IP-Core "ACC_Cores" as part system-on-chip. Multifunctional hardware accelerator Fast Fourier Transform - FFT_RT_Core // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2014. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2014. Part 4. P. 123-128.
URL of paper
	http://www.mes-conference.ru/data/year2014/pdf/D053.pdf