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Research of fully CMOS compatible EEPROM cell
Authors
	Ermakov I.V.
Date of publication
	2014
Abstract
	The characteristics of the experimental EEPROM cell with tunnel oxide with a thickness of 7 nm manufactured in a standard CMOS process with design rules of 0,18 microns are presented. The dependences of the threshold voltage of the memory cell from time and from write/erase voltage, from the number of write cycles (endurance) and from the number of days of annealing at 100 and 150C were researched. Additionally the memory cell with tunnel oxide with a thickness of 3,2 nm was researched. For the study memory cells the values of charge loss activation energy and retention time at different temperatures were calculated.
Keywords
	CMOS, EEPROM, flash memory, floating gate, memory cell
Library reference
	Ermakov I.V. Research of fully CMOS compatible EEPROM cell // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2014. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2014. Part 2. P. 173-178.
URL of paper
	http://www.mes-conference.ru/data/year2014/pdf/D173.pdf