| The technique of test generator realization for built-in self-test circuitries |
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| Authors |
| | Bykhanova N.V. |
| | Mosin S.G. |
| Date of publication |
| | 2014 |
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| Abstract |
| | The technique of test generator realization for built-in self-test circuitries has been proposed. The technique is oriented on minimization of hardware overheads and dealt with automatization of test generator circuitries generation. The main idea consists in the use one test generator based on linear feedback shift register in two types of testing – pseudorandom and deterministic. Experiment results have been proposed. |
| Keywords |
| | built-in self-test, test generator, LFSR, fault coverage |
| Library reference |
| | Bykhanova N.V., Mosin S.G. The technique of test generator realization for built-in self-test circuitries // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2014. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2014. Part 4. P. 95-100. |
| URL of paper |
| | http://www.mes-conference.ru/data/year2014/pdf/D076.pdf |
