| Synthesis of memory units using a description of design rules via Boolean functions of layout objects |
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| Authors |
| | Ryzhenko N.V. |
| | Sorokin A.A. |
| | Bykov S.A. |
| Date of publication |
| | 2014 |
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| Abstract |
| | In this paper we present some aspects of physical synthesis of memory control units for advanced technologies. An universal description of design rules is presented. We propose a design rule clean detailed routing algorithm for balanced trees with the minimizations of wire segments. Experimental results demonstrated applicability of the proposed approach for the physical synthesis of memory control units. |
| Keywords |
| | routing, standard cells, memory, Boolean satisfiability, optical lithography |
| Library reference |
| | Ryzhenko N.V., Sorokin A.A., Bykov S.A. Synthesis of memory units using a description of design rules via Boolean functions of layout objects // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2014. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2014. Part 1. P. 127-132. |
| URL of paper |
| | http://www.mes-conference.ru/data/year2014/pdf/D039.pdf |
