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A method for reducing timing delay temperature dependence of digital integrated circuits

Authors
 Melikyan V.Sh.
 Babayan E.H.
 Harutyunyan A.G.
 Melikyan N.V.
 Zargaryan G.E.
Date of publication
 2012

Abstract
 The effects of inverse temperature dependence of timing delays of elements and complete integrated circuits are studied for 90nm node and below. Experimental calculations of optimal supply voltages for digital standard cells are presented. A method of reducing impact of temperature fluctuations on integrated circuits performance by increasing supply power and minor increase of consumed power is presented. Experimental basis of determining optimal values of integrated circuit supply voltages is presented.
Keywords
 temperature, digital integrated circuit, threshold voltage, performance
Library reference
 Melikyan V.Sh., Babayan E.H., Harutyunyan A.G., Melikyan N.V., Zargaryan G.E. A method for reducing timing delay temperature dependence of digital integrated circuits // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2012. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2012. P. 409-412.
URL of paper
 http://www.mes-conference.ru/data/year2012/pdf/D87.pdf

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