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Problem of a transistor length variation in a standard cell at multi-objective optimization of nano-size VLSI
Authors
	MelikAdamyan A.F.
	Ryzhov A.P.
Date of publication
	2010
Abstract
	With shrinking CMOS technology, the accurate trade-off between delay, static power consumption and yield of a digital circuit is becoming the most important factor while designing a functionally reliable and low power circuit. Gate sizing has emerged as one of the efficient way to achieve the goal in post-layout step of design flow. In the past single-objective optimization techniques have been used to optimize the timing variation, power or yield whereas on the other hand multi-objective optimization techniques can provide a more promising approach to design the circuit. We propose an algorithm based on multi-objective optimization technique called Non-dominated Sorting Genetic Algorithm. It optimizes a circuit in multi domains and provides the user with Pareto-optimal set of solutions which are distributed all over the optimal design spectrum, giving users the flexibility to choose the best fitting solution for their requirements. Algorithm overcomes the disadvantages of traditional optimization techniques.
Keywords
	CAD of microelectronicx, genetic algoriths, multi-objective optimization
Library reference
	MelikAdamyan A.F., Ryzhov A.P. Problem of a transistor length variation in a standard cell at multi-objective optimization of nano-size VLSI // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2010. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2010. P. 204-207.
URL of paper
	http://www.mes-conference.ru/data/year2010/papers/m10-290-61011.pdf