| Self-checking digital devices organization by Boolean complement method with Hamming codes |
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| Authors |
| | Efanov D.V. |
| | Pivovarov D.V. |
| | Osadchy G.V. |
| | Zueva M. |
| Date of publication |
| | 2022 |
| DOI |
| | 10.31114/2078-7707-2022-1-43-49 |
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| Abstract |
| | The paper proposed to use Hamming codes in the self-checking digital device synthesis with concurrent error-detection circuit implemented by the Boolean complement method. The main features of the Hamming code parameters choice in the concurrent error-detection circuit synthesis using the Boolean complement method are shown. The concurrent error-detection circuit structures organized by the Boolean complement method using Hamming codes are given. The advantages of using this codes class in the self-checking digital devices synthesis are shown. The features and results of modeling the digital combinational circuits structures using Logisim technical tools are presented. These tools show the Hamming codes effective-ness in the concurrent error-detection circuit synthesis using the Boolean complement method. |
| Keywords |
| | self-checking digital device; Boolean complement method; Hamming code; error detection in code words; concurrent error-detection circuit (CED circuit); error detection on output. |
| Library reference |
| | Efanov D.V., Pivovarov D.V., Osadchy G.V., Zueva M. Self-checking digital devices organization by Boolean complement method with Hamming codes // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2022. Issue 1. P. 43-49. doi:10.31114/2078-7707-2022-1-43-49 |
| URL of paper |
| | http://www.mes-conference.ru/data/year2022/pdf/D002.pdf |
