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Design of All-digital Phase-locked Loop  

Authors
 Khalirbaginov R.I.
Date of publication
 2021
DOI
 10.31114/2078-7707-2021-4-114-121

Abstract
 A design methodology of an all-digital phase-locked loop based on standard library cells is presented. The design route includes development of a scalable architecture to enable migration to various technology libraries. The design features of the main blocks allow automatic placement and routing in a digital route without degradation of the circuit characteristics. The proposed architecture combines design simplicity and good performance.
Keywords
 digitally controlled oscillator, phase-locked loop, standard cells library, time-measuring system, phase detector.
Library reference
 Khalirbaginov R.I. Design of All-digital Phase-locked Loop // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2021. Issue 4. P. 114-121. doi:10.31114/2078-7707-2021-4-114-121
URL of paper
 http://www.mes-conference.ru/data/year2021/pdf/D087.pdf

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