Listing of all the works of the author. Click on the work title to get the full information.
| 2008 | |
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Amerbaev V.M., Telpukhov D.V., Konstantinov A.V.
The Bivalent Defect of Modular Codes. The Choise of Technological Modules, that Reduce Bivalent Defect
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| 2010 | |
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Balaka E.S., Amerbaev V.M., Konstantinov A.V., Telpukhov D.V.
Methods of Scalar Products Speed Enhancement in Residue Logarithmic Number System Basis
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Telpukhov D.V., Amerbaev V.M., Balaka E.S., Konstantinov A.V.
Design method of DSP-oriented modular logarithmic forward converter
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| 2012 | |
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Amerbaev V.M., Balaka E.S., Konstantinov A.V., Telpukhov D.V.
The RLNS Implementation for matrix algebra special problems solution
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Amerbaev V.M., Telpukhov D.V., Balaka E.S., Konstantinov A.V.
Implementation of Residue Number Systems Converter Combined with the Rounding Operation for DSP Applications
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| 2014 | |
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Amerbaev V.M., Balaka E.S., Solovyev R.A., Telpukhov D.V.
Analysis and synthesis of arithmetic unit of a field of Galois of prof. Pospelov D.A.
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Solovyev R.A., Balaka E.S., Telpukhov D.V.
Device for calculation of vector dot product with error correction based on residue number system
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Telpukhov D.V., Amerbaev V.M., Balaka E.S., Solovyev R.A.
Hardware implementation of FIR filter based on number-theoretic fast Fourier transform in residue number system
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| 2016 | |
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Telpukhov D.V., Solovyev R.A., Balaka E.S., Rukhlov V.S., Mikhmel A.S.
Design features of the multipliers on the module using advanced CAD
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Stempkovsky A.L., Telpukhov D.V., Solovyev R.A., Telpukhova N.V.
Probabilistic methods for reliability evaluation of combinational circuits
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| 2018 | |
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Nadolenko V.V., Telpukhov D.V., Bitkov U.
Development of Resynthesis Flow for Improving Logical Masking Features of Combinational Circuits
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Telpukhov D.V., Zhukova T.D., Demeneva A.I., Gurov S.I.
Circuit of the Functional Control for Combinational Circuits Based on R-code
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Telpukhov D.V.
Development of Methods for Genetic Synthesis of Fault-Tolerant Logic circuits
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| 2020 | |
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Mikhmel A.S., Mkrtchan I.A., Telpukhov D.V.
Development of Special Logic Element Models for Timing Analysis of Reconfigurable System-on-a-Chip
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| 2021 | |
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Telpukhov D.V., Nadolenko V.V.
Reliability-Driven Logic Synthesis Using Arbitrary Standard Cell Library
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Telpukhov D.V., Zhukova T.D., Kretinina P.D.
Analytical Method for Choosing the Most Efficient Algorithm for Fault-Tolerant Combinational Circuits Synthesis
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| 2022 | |
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Stempkovsky A.L., Telpukhov D.V., Mkrtchan I.A., Solovyev R.A.
Implementation of an RNS Reverse Converter for General Moduli Sets Based on LUTs with Reference Points
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Kustov A.G., Solovyev R.A., Stempkovsky A.L., Telpukhov D.V.
Hardware Implementation of a Neural Network for Object Detection in FPGA
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Stempkovsky A.L., Telpukhov D.V., Zhukova T.D.
Development of Concurrent Error Detection Circuit Based on Automated Generation of Error-Correcting Code
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