Listing of all the works of the organization. Click on the work title to get the full information.
| 2006 | |
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Bibilo P.N., Kochanov D.A.
Optimizational transformations of VHDL-models of digital systems
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Bibilo P.N., Kardash S.N., Romanov V.I.
SsVER - system of synthesis and verification of combinational logic schemes
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| 2008 | |
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Bibilo P.N., Audzeyeu M.A.
Designing of regular circuits with consecutive connections of transistors
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Kirienko N.A.
The subsystem for processing structure-functional descriptions of circuits in a CAD system
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| 2010 | |
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Romanov V.I., Bibilo P.N., Loginova I.P., Cheremisinova L.D.
Computer-aided design of topology of functional blocks of custom digital VLSI
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Bibilo P.N.
Decomposition of Boolean Functions for BDD
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Cheremisinova L.D., Cheremisinov D.I.
Low Power Driven Optimization of Two-Level Logic Circuits
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| 2012 | |
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Audzeyeu M.A., Zaitsay V.S.
Design criteria of Frequency selection for the internal oscillator UHF RFID tags
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Bibilo P.N., Cheremisinova L.D., Kardash S.N., Kirienko N.A., Leonchik P.V., Novokov D.Ya., Romanov V.I., Cheremisinov D.I.
Low-Power Synthesis of Logical CMOS Circuits
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Bibilo P.N., Soloviev A.L.
VHDL-Simulation-Based Evaluation of CMOS-Circuits Power Consumption
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| 2014 | |
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Bibilo P.N.
Decomposition and Minimization of Binary Decision Diagrams for Systems of Specified Boolean Functions
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Cheremisinov D.I.
FPGA reverse engineering by model-driven development
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Cheremisinova L.D.
Verification of Logical Descriptions of Combinational Circuits
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| 2016 | |
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Bibilo P.N.
The use of VHDL models of partial Boolean functions for the design of digital circuits
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Cheremisinov D.I., Cheremisinova L.D.
Use of parallel computing in VLSI computer-aided design
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| 2018 | |
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Audzeyeu M.A., Bibilo P.N.
Algorithmic Design of Digital Operational Units with Low Power Consumption
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Cheremisinov D.I., Cheremisinova L.D.
Decompilation of Flat CMOS Circuits in SPICE Format
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| 2020 | |
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Bibilo P.N., Lankevich Y.Y.
Experimental Research of Effectiveness of Programs for Minimizing BDD Representations of Boolean Function Systems in Synthesis of Combinatorial CMOS Circuits
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Bibilo P.N., Romanov V.I.
The system of logical optimization of functional structural descriptions of digital circuits based on production-frame knowledge representation model
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Cheremisinov D.I., Cheremisinova L.D.
Verification of digital devices with concurrency behavior
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| 2021 | |
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Bibilo P.N.
Algebraic Decompositions of Cofactors in BDD Representations of a Systems of Incompletely Defined Boolean Functions
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| 2022 | |
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Bibilo P.N., Audzeyeu M.A., Kirienko N.A.
Estimating of the Power Consumption of Combinational CMOS Circuits Based on Logic VHDL Simulation
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Bibilo P.N.
Hardware Implementation of Code Converters Designed to Reduce the Length of Binary Encoded Words
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Kardash S.N.
Ortogonalization of the DNF System of Boolean Function
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Cheremisinov D.I., Cheremisinova L.D.
Reverse Engineering of VLSI for Equipment Safety
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Cheremisinova L.D.
Testing Systems with Behavior Parallelism Based on a Reduced Reachability Graph
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