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Development of Special Logic Element Models for Timing Analysis of Reconfigurable System-on-a-Chip
Authors
	Mikhmel A.S.
	Mkrtchan I.A.
	Telpukhov D.V.
Date of publication
	2020
DOI
	10.31114/2078-7707-2020-3-73-78
Abstract
	In this paper, we proposed and investigate several ways to implement the method of partial characterization of special blocks and the fast calculation based on it of the time delays of a circuit implemented in a reconfigurable system on a chip (RSoC). The RSoC under consideration is a new VLSI architecture that contains reconfigurable logic blocks and IP cores based on FPGA, such as RAM, PLL, LVDS, multipliers, and others. Special blocks include the basic element and routing elements. The base element implements combinational or sequential logic, or it may be an I/O device. Partial characterization of a single such cell takes much less time than the time of modeling the entire circuit in an electrical simulator. At the same time, the maximum possible complexity of a special macrocell is known in advance for a specific RSoC. Based on this, we can estimate the total time of characterization, generation of a library of special cells, and calculation of time delays. Moreover, it is possible to automatically generate characterization tasks on different server cores, which parallelizes the process and significantly reduces the overall runtime. The method allows you to achieve a fairly accurate calculation of the time delays of the circuit for an acceptable time, which makes it possible to use it in the task of searching the optimal routing solution. The method is also optimized over time due to partial characterization of special cells that include only routing elements. Time delays are calculated from the data described above and presented in the provided library of standard cells. The method has shown excellent practical application in the CAD flow for domestic RSoC.
Keywords
	reconfigurable system-on-a-chip, RSoC, programmable logic, partial characterization, static timing analysis, clustering.
Library reference
	Mikhmel A.S., Mkrtchan I.A., Telpukhov D.V. Development of Special Logic Element Models for Timing Analysis of Reconfigurable System-on-a-Chip // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2020. Issue 3. P. 73-78. doi:10.31114/2078-7707-2020-3-73-78
URL of paper
	http://www.mes-conference.ru/data/year2020/pdf/D055.pdf