| Resynthesis methods for FPGAs based on cells with separated outputs and built-in feedback |
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| Authors |
| | Tiunov I.V. |
| Date of publication |
| | 2020 |
| DOI |
| | 10.31114/2078-7707-2020-2-50-56 |
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| Abstract |
| | In previous works it was shown that taking the FPGA architecture features into account can significantly reduce the area occupied by the circuit. This work is a further development of the idea of architecture-oriented optimization and it proposes two additional methods to reduce both the number of occupied cells and the number of interconnections.
The introduction provides an overview of the main advantages and disadvantages of FPGAs. The conclusion is that it is necessary to take into account architectural features to achieve the best performance.
In the second chapter, using the Altera’s MAX 10 FPGA programming logic block (PLB), some structural features that can be used to optimize circuits during resynthesis are shown.
The third chapter reviews the methods of resynthesis described in previous works [6]. Direct Combinating Methods (DCMs) use LUT-DFF programmable interconnection to minimize the number of PLBs.
The fourth chapter is devoted to the development of the Independent Combinating Method (ICM). This method uses the ability to configure a dedicated input for a trigger and a second output of the PLB to combine independent circuit elements. The results of method approbation applying both DCMs and ICM are presented. The maximum total reduction in area reaches 39%.
The fifth chapter is devoted to the development of a method of feedbacks utilization. It is shown that in some cases after applying both DCMs and ICM the loops are formed. The method uses PLB’s built-in feedback to move the loop inside the block. The method was approbate on IWLS-2005 circuits. After applying the method, the number of pin-to-pin connections was reduced to 11%.
Chapter six talks about integrating methods into existing CAD systems.
In conclusion, the results are summarized. It is indicated that although the proposed methods can significantly reduce the occupied area, performance also depends on placement and tracing. |
| Keywords |
| | FPGA; resynthesis; technology mapping. |
| Library reference |
| | Tiunov I.V. Resynthesis methods for FPGAs based on cells with separated outputs and built-in feedback // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2020. Issue 2. P. 50-56. doi:10.31114/2078-7707-2020-2-50-56 |
| URL of paper |
| | http://www.mes-conference.ru/data/year2020/pdf/D048.pdf |
