| Modification of the High Bandwidth Solid State Drive Controller within the multi-stage architecture |
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| Authors |
| | Dubrovin A.A. |
| Date of publication |
| | 2020 |
| DOI |
| | 10.31114/2078-7707-2020-2-158-164 |
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| Abstract |
| | This article is devoted to the implementation of a hardware solution for constructing a flexible architecture with the possibility of scaling and redundancy of devices due to the proposed method of constructing a multi-stage or fractal hierarchy of the modified solid-state drive. It is applied in order to eliminate the gap in the bandwidth of the transceiver interface of devices and non-volatile memory.
The most important advantages include the ability to upgrade, scalability and refinement of storage systems, along with transferring and encapsulating the user part of the storage system software at the modified solid-state drive level.
The metodic proposed in this article states that it is possible to apply a heterogeneous device in such a way that the principles underlying the multi-stage storage system are fulfilled. The architecture of such devices can have a different number of input and output interfaces, as well as interfaces between different level devices. As a result, it forms a fractal-like system of devices due to the similarity of array fragments to the array of devices as a whole. This approach allows the most parametrized design of storage systems, which enhances the systems' flexibility.
Therefore, the best bandwidth solution among the homogeneous multi-stage modified solid-state drive architectures is a system in which redundancy is sufficient to run background algorithms in conjunction with the normal operating mode, under ideal conditions. In this article, the analysis of an array consisting of 12 NVMe PCIe 4x16 devices with a bandwidth of 31.5 GB/s was proved to become redundant. |
| Keywords |
| | Non-Volatile Memory Host Controller Interface, SSD, solid state disc, direct access storage. |
| Library reference |
| | Dubrovin A.A. Modification of the High Bandwidth Solid State Drive Controller within the multi-stage architecture // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2020. Issue 2. P. 158-164. doi:10.31114/2078-7707-2020-2-158-164 |
| URL of paper |
| | http://www.mes-conference.ru/data/year2020/pdf/D046.pdf |
