| Timing-driven placement algorithm based on delay matrix model for reconfigurable system-on-chip |
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| Authors |
| | Frolova P.I. |
| | Chochaev R. |
| | Ivanova G.A. |
| | Gavrilov S.V. |
| Date of publication |
| | 2020 |
| DOI |
| | 10.31114/2078-7707-2020-1-2-7 |
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| Abstract |
| | Placement is one of the most difficult stages of reconfigurable system-on-chip design flow. Designing high-speed systems requires efficient timing-driven placement algorithms.
In this article we present a new timing-driven placement algorithm based on simulated annealing method for the island-style RSoC. Since the island-style RSoC is hierarchical our algorithm is divided in two stages: global and detailed. At the global stage we place groups of logic elements (GLE) with respect to the assigned input/output cells and macroblocks. At the detailed stage we place logic elements inside each GLE. We developed new cost function for detailed placement that takes into account number of switches.
To minimize critical path delay we use delay lookup matrices. We use the number of switches in the routed path to predict pin-to-pin interconnection delay. To calculate the number of switches we place two elements (source and sink) with a distance (Δi, Δj) and route them with the same router that will be used at the final routing.
To route two elements placed in different GLEs we define virtual element in the path. Virtual sink is placed in the same GLE with source. We calculate amount of switches between source and virtual sink and add extra fine for global bus. Virtual element placement ensures shortest path from source to sink.
Experimental results showed timing improvement by an average 18% and increased wirelength by an average 11% compared to wirelength-driven algorithm based on Star+ model.
Proposed algorithm showed its efficiency in high-speed RSoC design flow. |
| Keywords |
| | FPGA, reconfigurable system-on-chip (RSoC), electronic design automation (EDA). |
| Library reference |
| | Frolova P.I., Chochaev R., Ivanova G.A., Gavrilov S.V. Timing-driven placement algorithm based on delay matrix model for reconfigurable system-on-chip // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2020. Issue 1. P. 2-7. doi:10.31114/2078-7707-2020-1-2-7 |
| URL of paper |
| | http://www.mes-conference.ru/data/year2020/pdf/D020.pdf |
