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A 65-nm Implementation of Tandem-Style Fractional-N Synthesizer for video controller |
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Authors |
| Boroshko S.I. |
| Kirichenko P.G. |
| Tarasov I.V. |
| Tkachenko E.V. |
| Khokhlova A.G. |
Date of publication |
| 2020 |
DOI |
| 10.31114/2078-7707-2020-1-100-105 |
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Abstract |
| Video controllers require clock frequency with a value that contains fractional part. This part is a multiple of 250 kHz as VESA standard declares. Thus, a designer of frequency synthesizer for display has to follow conflicting requirements simultaneously: wide range of frequencies with small steps of their setup. The common approach for solving this issue is using of fractional-N techniques such as phase interpolators, randomizers, sigma-delta modulators, etc. However, these circuits add significant component into jitter value, which may results in display blinking, artefacts and other video output problems.
In this article, we propose another method of receiving fractional frequency value by using of two subsequent identical integer synthesizers (called Tandem-style). Each of them has jitter value definitely smaller than fractional-N blocks. Thus, the output frequency of the first one is the reference for the second. As a result, the output frequency of such circuit may be calculated using an equation with six coefficients instead of three ones.
The doubled number of coefficients allows obtaining significantly more number of fractional frequency values than one integer synthesizer. For example, in the range of 500…501 MHz the sequence of values is (in MHz): 500.00, 500.09, 500.15, 500.17, 500.22, 500.28, 500.29, 500.32, 500.39, 500.44, 500.47, 500.48, 500.52, 500.55, 500.60, 500.62, 500.69, 500.75, 500.77, 500.89, 500.96, 500.97, 501.00. Despite of the fact that in the above sequence one cannot find the exact frequency values with step of 250 kHz (there are no 500.25 and 500.50 MHz) the nearest available frequencies have a difference of several dozens of kHz from the required values. This place them into the target of accuracy declared in VESA standard (0.5%).
In the last section of the article, we discuss the experimental diagrams of clock waveforms obtained for the 65-nm chip of a microprocessor with embedded video controlled built on the proposed approach. |
Keywords |
| PLL, jitter, fractional-N |
Library reference |
| Boroshko S.I., Kirichenko P.G., Tarasov I.V., Tkachenko E.V., Khokhlova A.G. A 65-nm Implementation of Tandem-Style Fractional-N Synthesizer for video controller // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2020. Issue 1. P. 100-105. doi:10.31114/2078-7707-2020-1-100-105 |
URL of paper |
| http://www.mes-conference.ru/data/year2020/pdf/D009.pdf |
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