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Modern tools of compilation of device models from high level language Verilog-A to internal representation of system Spectre |
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Authors |
| Sukharev S.A. |
| Spitsyn V.Yu. |
| Yusim I.E. |
Date of publication |
| 2006 |
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Abstract |
| The writing and debugging of mathematical models of devices in well structured, specialized language of a high level essentially is easier, than in the universal programming language, for example in language C. Now procedure of working out ready for compilation C-code for simulation systems with strictly defined interface of models of components is realized. Getting a code is carried out by compilation of language of the description of models of high level Verilog-A in language C. |
Keywords |
| high level models, Verilog-A, Spectre |
Library reference |
| Sukharev S.A., Spitsyn V.Yu., Yusim I.E. Modern tools of compilation of device models from high level language Verilog-A to internal representation of system Spectre // Problems of Perspective Microelectronic Systems Development - 2006. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2006. P. 97-102. |
URL of paper |
| http://www.mes-conference.ru/data/year2006/16.pdf |
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