| Using Formal Coverage Analyzer for Code Coverage Improvement |
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| Authors |
| | Tatarnikov Y.A. |
| Date of publication |
| | 2018 |
| DOI |
| | 10.31114/2078-7707-2018-2-99-101 |
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| Abstract |
| | This presentation summarizes the results of using the tool grounded on formal proof technics (in this case the tool is Synopsys Formal Coverage Analyzer (FCA)) to improve code coverage for two design Blocks.
The goal is to find unreachable coverage constructs (UNRs) in the target design Blocks and remove them from the list of uncovered constructs. The removal of UNRs saves the Designers and Verification Engineers the time needed to achieve high level of code coverage.
FCA became part of the design and verification methodology within our organization following its successful evaluation. |
| Keywords |
| | Design Verification, Formal Verification, SystemVerilog, SVA. |
| Library reference |
| | Tatarnikov Y.A. Using Formal Coverage Analyzer for Code Coverage Improvement // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2018. Issue 2. P. 99-101. doi:10.31114/2078-7707-2018-2-99-101 |
| URL of paper |
| | http://www.mes-conference.ru/data/year2018/pdf/D124.pdf |
