| Ethernet Switch IP-core for Wireless Backhaul Systems |
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| Authors |
| | Kobyakov R.S. |
| | Shevchenko A.A. |
| | Makhlyshev M. |
| | Maslennikov R.O. |
| Date of publication |
| | 2018 |
| DOI |
| | 10.31114/2078-7707-2018-2-178-184 |
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| Abstract |
| | This article presents design a 3-port Ethernet switch IP-core for a point-to-point wireless backhaul system. The IP-core is dedicated for implementation of in-band management via switching of Ethernet frames between the external Ethernet interface, the data interface of the radio modem and the net-work interface of the CPU. The switch supports 10/100/1000 Mbps data rates and routes Layer-2 frames based on their Ethernet MAC addresses, virtual network identifiers (IEEE 802.1Q VLAN ID) and logical interconnections between Ether-net MAC interfaces (port-based VLANs). The switch architec-ture and FPGA hardware implementation features are present-ed.
The switch architecture is optimized for specific requirements of the in-band management application and characteristics of the transmitted traffic. The following main requirements are taken into account:
• Switching of the Ethernet frames between three ports based on MAC addresses [3].
• The major part of traffic is transmitted between the Ethernet interface and the radio modem. Therefore, frame commutation is based on a hybrid scheme that combines a “cut-through” approach for most frames and full buffer-ing in the cases of a flooding or a target output port occu-pation by another transmission.
• The maximum input data rate for each port is 1 Gbps with independent support on different ports of 10 and 100 Mbps.
• The receiver of the radio modem includes a buffer for in-put data therefore the size of ingress port buffers can be decreased up to several maximum frame lengths.
• Ethernet Flow Control standard [4] is supported for loss-less data transmission in case of exceeding the egresses port maximum bandwidth that protects input buffers against an overflow and received frames damaging.
• The network switch topology can include different virtual LANs and frames are routed between ingress and egress ports via VLAN header information according to IEEE 802.1Q specification [5] and software-defined rules for each port and VLAN ID.
• Port-Based VLAN determines a logical interconnection between each switch port pair and allows or denies data transferring in each direction.
The switch IP core was prototyped and verified using the Xil-inx XC7Z020T FPGA device. The resource utilization estimates are the following:
• Flip-Flop count: 5202 (4.89%)
• LUT count: 2588 (4.86%)
• BRAM count: 21 (12.29%)
Presented results demonstrated efficient hardware resource utilization allow to consider as appropriate for practical imple-mentation. |
| Keywords |
| | IP-core, Ethernet switch, FPGA, system-on-a-chip, wireless backhaul. |
| Library reference |
| | Kobyakov R.S., Shevchenko A.A., Makhlyshev M., Maslennikov R.O. Ethernet Switch IP-core for Wireless Backhaul Systems // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2018. Issue 2. P. 178-184. doi:10.31114/2078-7707-2018-2-178-184 |
| URL of paper |
| | http://www.mes-conference.ru/data/year2018/pdf/D103.pdf |
