| A Practical Approach to Verification of Multicore Microprocessor Models |
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| Authors |
| | Grevtsev N.A. |
| | Chibisov P.A. |
| Date of publication |
| | 2018 |
| DOI |
| | 10.31114/2078-7707-2018-2-52-58 |
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| Abstract |
| | In the paper the early stage of verification technology for multicore processor models testing is proposed. We demonstrate the applicability of the single core verification method extension where a creating new multicore test generator is not required. The solution scheme deals with the adaptation method of some available single core stochastic testing approaches to a fully functional multicore testing tool.
The proposed technique has been successfully applied to test RTL-model of dual-core microprocessor with SMP developed in SRISA. The discussed approach was initially considered to be a first stage of RTL-model testing, but the possibilities of the approach are also of interest for testing the model at the later stages of its design and functional maturity.
The testing process begins by creating simple random tests that check the MOESI coherence protocol. New advanced random testing method based on the usage of proposed interleaved memory structures is developed to increase the probability of finding rare and hard to detect bugs in the memory subsystem. |
| Keywords |
| | functional verification, RTL-model of microprocessor, multicore, stochastic testing, pseudorandom tests generation, false sharing, memory subsystem, SMP, MOESI, cache coherence, pre-silicon verification. |
| Library reference |
| | Grevtsev N.A., Chibisov P.A. A Practical Approach to Verification of Multicore Microprocessor Models // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2018. Issue 2. P. 52-58. doi:10.31114/2078-7707-2018-2-52-58 |
| URL of paper |
| | http://www.mes-conference.ru/data/year2018/pdf/D054.pdf |
