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Self-timed D-trigger with «Load/Latch»
Authors
	Starykh A.A.
	Lukyanenko E.B.
Date of publication
	2018
DOI
	10.31114/2078-7707-2018-2-130-135
Abstract
	One- and two-step self-timed D-triggers with a "load/latch" are considered. All self-timed D-triggers considered in the work have a two-wire organization, their inputs are D, are paraphase, and outputs are Q, bistable. At the output of each D-trigger, there is an indicator of the transient processes necessary for the self-timed circuits to actually determine the end of the working and spacer phases. The realization of the circuit of the indicator of transients by the block method is proposed. The results of simulation of self-timed D-triggers performed on standard logic elements «AND», «OR», «AND-NO», «OR-NO» and developed self-timed D-triggers with «load/latch». The development of an optimized D-trigger with a "load/latch" made it possible to obtain improved performance from the proposed device. The developed circuit of the D-trigger has advantages over the circuits using RS‒triggers, since there is no forbidden state in it. For the developed self-timed D–trigger all the requirements for self-timed store cell, therefore its use in sequential circuits can be considered promising. The two-step D–trigger with «load/latch», that triggers on the negative front is obtained by the successive inclusion of two one-step D-triggers. To provide a self-timed mode, the end of the transient process in the first stage is determined, the recording and storage mode in both stages is switched to the opposite one and the end of the transient in the second stage is determined. D-triggers are compared by speed, average dissipated power, number of transistors, switching operation and energy efficiency. The latter parameter is the product of the switching operation by the number of transistors and is the generalizing value characterizing the energy efficiency of the circuit of interest. The performance of developed D-trigger with «load/latch» and D–trigger on standard logic elements were measured in a continuous mode of switching input signals. The speed of developed one-step D-trigger with «load/latch» higher than the compatible of 2,03 times, dissipated power – 2,06 times, energy efficiency – 9,5 times. The speed of developed two-step D-trigger with «load/latch» higher than the compatible of 1,58 times, dissipated power – 1,83 times, energy efficiency – 7,7 times.
Keywords
	self–timed element, D–trigger, block structure, indicator of transient, power dissipation, performance of the circuit, energy–topological criterion.
Library reference
	Starykh A.A., Lukyanenko E.B. Self-timed D-trigger with «Load/Latch» // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2018. Issue 2. P. 130-135. doi:10.31114/2078-7707-2018-2-130-135
URL of paper
	http://www.mes-conference.ru/data/year2018/pdf/D028.pdf