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Trends in development of content addressable memory architectures and its application in the parallel dataflow computing system
Authors
	Zmejev D.N.
	Kuzmin E.N.
	Levchenko N.N.
	Okunev A.S.
Date of publication
	2016
Abstract
	The article describes the functions of the matching processor, one of the key blocks of the parallel dataflow computing system "Buran". Provides the peculiarities of its implementation and approaches to prototyping as part of PDCS. Content addressable memory of keys, which is part of the matching processor, most efficiently implemented as a hardware memory type TCAM. Describes the differences between standard CAM and TCAM, the application scope of content addressable memory in the computing systems, as well as implementation variants of content addressable memory of keys at developing of parallel dataflow computing system. The article also focuses on the issue of energy efficiency of computing systems. Defined the main problems to solve by the re-searchers-developers of ternary content addressable memory. Describes the current status abroad in the developing of new TCAM architectures on different principles, and the problems of energy consumption reduction of TCAM itself.
Keywords
	features of matching processor, ternary content addressable memory, prototype of the parallel dataflow computing system, memory of keys.
Library reference
	Zmejev D.N., Kuzmin E.N., Levchenko N.N., Okunev A.S. Trends in development of content addressable memory architectures and its application in the parallel dataflow computing system // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2016. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2016. Part 2. P. 114-119.
URL of paper
	http://www.mes-conference.ru/data/year2016/pdf/D157.pdf