| An approach to hardware test point insertion automation based on hardware reengineering tools |
|
|
| Authors |
| | Nenashev O.V. |
| Date of publication |
| | 2014 |
|
| Abstract |
| | This paper presents a new test point and built-in self-test insertion approach based on hardware reengineering automation tools. This approach utilizes the hybrid device representation model to represent information about high-level device descriptions and its netlists in analysis and transformation algorithms. The paper describes architectures of test agents and interfaces being inserted into the system. The proposed approaches have been implemented as an extension for a hardware reengineering framework prototype called PHRT. This prototype has been successfully evaluated in several industrial and academic projects. The paper provides a case study for the project devoted to an integrated development environment for the automatic FPGA-based testing of the complex system-on-chip. The PHRT-based solution has decreased overall testing efforts by 2 times. |
| Keywords |
| | reengineering automation, hardware reengineering, computer-aided design, hybrid model, device model, test point insertion, test automation, in-circuit testing |
| Library reference |
| | Nenashev O.V. An approach to hardware test point insertion automation based on hardware reengineering tools // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2014. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2014. Part 2. P. 101-106. |
| URL of paper |
| | http://www.mes-conference.ru/data/year2014/pdf/D176.pdf |
