Hardware acceleration of digital simulation |
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Authors |
| Zaitsay V.S. |
Date of publication |
| 2014 |
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Abstract |
| Describes one of the possible options to accelerate the simulation of synchronous digital integrated circuit through the use of FPGA prototype instead of its HDL model. A review of existing solutions and performance analysis of computer ports for their use in the implementation of solutions acceleration low-cost system. |
Keywords |
| FPGA prototype; SystemC; modeling, COM-port, LPT-port, USB-port |
Library reference |
| Zaitsay V.S. Hardware acceleration of digital simulation // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2014. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2014. Part 2. P. 81-84. |
URL of paper |
| http://www.mes-conference.ru/data/year2014/pdf/D150.pdf |